Docs.rs
autd3-firmware-emulator-22.0.2
autd3-firmware-emulator 22.0.2
Docs.rs crate page
MIT
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Repository
crates.io
Source
Owners
s5suzuki
Dependencies
autd3-driver ^22.0.2
normal
chrono ^0.4.31
normal
num-integer ^0.1.45
normal
thiserror ^1.0.40
normal
anyhow ^1.0.79
dev
autd3-derive ^22.0.2
dev
itertools ^0.12.0
dev
rand ^0.8.5
dev
Versions
0%
of the crate is documented
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Platform
i686-pc-windows-msvc
i686-unknown-linux-gnu
x86_64-apple-darwin
x86_64-pc-windows-msvc
x86_64-unknown-linux-gnu
Feature flags
docs.rs
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autd3_firmware_emulator
22.0.2
Module params
Constants
In autd3_firmware_emulator::cpu
?
Module
autd3_firmware_emulator
::
cpu
::
params
source
·
[
−
]
Constants
§
BRAM_ADDR_CTL_FLAG
BRAM_ADDR_DEBUG_OUT_IDX
BRAM_ADDR_ECAT_SYNC_TIME_0
BRAM_ADDR_ECAT_SYNC_TIME_1
BRAM_ADDR_ECAT_SYNC_TIME_2
BRAM_ADDR_ECAT_SYNC_TIME_3
BRAM_ADDR_FPGA_STATE
BRAM_ADDR_MOD_CYCLE_0
BRAM_ADDR_MOD_CYCLE_1
BRAM_ADDR_MOD_FREQ_DIV_0_0
BRAM_ADDR_MOD_FREQ_DIV_0_1
BRAM_ADDR_MOD_FREQ_DIV_1_0
BRAM_ADDR_MOD_FREQ_DIV_1_1
BRAM_ADDR_MOD_MEM_WR_SEGMENT
BRAM_ADDR_MOD_REP_0_0
BRAM_ADDR_MOD_REP_0_1
BRAM_ADDR_MOD_REP_1_0
BRAM_ADDR_MOD_REP_1_1
BRAM_ADDR_MOD_REQ_RD_SEGMENT
BRAM_ADDR_PULSE_WIDTH_ENCODER_FULL_WIDTH_START
BRAM_ADDR_PULSE_WIDTH_ENCODER_TABLE_WR_PAGE
BRAM_ADDR_SILENCER_COMPLETION_STEPS_INTENSITY
BRAM_ADDR_SILENCER_COMPLETION_STEPS_PHASE
BRAM_ADDR_SILENCER_MODE
BRAM_ADDR_SILENCER_UPDATE_RATE_INTENSITY
BRAM_ADDR_SILENCER_UPDATE_RATE_PHASE
BRAM_ADDR_STM_CYCLE_0
BRAM_ADDR_STM_CYCLE_1
BRAM_ADDR_STM_FREQ_DIV_0_0
BRAM_ADDR_STM_FREQ_DIV_0_1
BRAM_ADDR_STM_FREQ_DIV_1_0
BRAM_ADDR_STM_FREQ_DIV_1_1
BRAM_ADDR_STM_MEM_WR_PAGE
BRAM_ADDR_STM_MEM_WR_SEGMENT
BRAM_ADDR_STM_MODE_0
BRAM_ADDR_STM_MODE_1
BRAM_ADDR_STM_REP_0_0
BRAM_ADDR_STM_REP_0_1
BRAM_ADDR_STM_REP_1_0
BRAM_ADDR_STM_REP_1_1
BRAM_ADDR_STM_REQ_RD_SEGMENT
BRAM_ADDR_STM_SOUND_SPEED_0_0
BRAM_ADDR_STM_SOUND_SPEED_0_1
BRAM_ADDR_STM_SOUND_SPEED_1_0
BRAM_ADDR_STM_SOUND_SPEED_1_1
BRAM_ADDR_VERSION_NUM_MAJOR
BRAM_ADDR_VERSION_NUM_MINOR
BRAM_CNT_SEL_FILTER
BRAM_CNT_SEL_MAIN
BRAM_SELECT_CONTROLLER
BRAM_SELECT_DUTY_TABLE
BRAM_SELECT_MOD
BRAM_SELECT_STM
CPU_VERSION_MAJOR
CPU_VERSION_MINOR
CTL_FLAG_DEBUG_SET
CTL_FLAG_DEBUG_SET_BIT
CTL_FLAG_FORCE_FAN
CTL_FLAG_FORCE_FAN_BIT
CTL_FLAG_MOD_SET
CTL_FLAG_MOD_SET_BIT
CTL_FLAG_PULSE_WIDTH_ENCODER_SET
CTL_FLAG_PULSE_WIDTH_ENCODER_SET_BIT
CTL_FLAG_SILENCER_SET
CTL_FLAG_SILENCER_SET_BIT
CTL_FLAG_STM_SET
CTL_FLAG_STM_SET_BIT
CTL_FLAG_SYNC_SET
CTL_FLAG_SYNC_SET_BIT
ERR_BIT
ERR_COMPLETION_STEPS_TOO_LARGE
ERR_FREQ_DIV_TOO_SMALL
ERR_INVALID_GAIN_STM_MODE
ERR_INVALID_INFO_TYPE
ERR_INVALID_MODE
ERR_INVALID_MSG_ID
ERR_INVALID_PWE_DATA_SIZE
ERR_INVALID_SEGMENT
ERR_INVALID_SEGMENT_TRANSITION
ERR_NOT_SUPPORTED_TAG
ERR_PWE_INCOMPLETE_DATA
FOCUS_STM_FLAG_BEGIN
FOCUS_STM_FLAG_END
FOCUS_STM_FLAG_UPDATE
GAIN_FLAG_UPDATE
GAIN_STM_FLAG_BEGIN
GAIN_STM_FLAG_END
GAIN_STM_FLAG_UPDATE
GAIN_STM_MODE_INTENSITY_PHASE_FULL
GAIN_STM_MODE_PHASE_FULL
GAIN_STM_MODE_PHASE_HALF
INFO_TYPE_CLEAR
INFO_TYPE_CPU_VERSION_MAJOR
INFO_TYPE_CPU_VERSION_MINOR
INFO_TYPE_FPGA_FUNCTIONS
INFO_TYPE_FPGA_VERSION_MAJOR
INFO_TYPE_FPGA_VERSION_MINOR
MODULATION_FLAG_BEGIN
MODULATION_FLAG_END
MODULATION_FLAG_UPDATE
NO_ERR
PULSE_WIDTH_ENCODER_FLAG_BEGIN
PULSE_WIDTH_ENCODER_FLAG_END
READS_FPGA_STATE_ENABLED
READS_FPGA_STATE_ENABLED_BIT
SILNCER_FLAG_MODE
SILNCER_FLAG_STRICT_MODE
SILNCER_MODE_FIXED_COMPLETION_STEPS
SILNCER_MODE_FIXED_UPDATE_RATE
STM_MODE_FOCUS
STM_MODE_GAIN
TAG_CLEAR
TAG_CONFIG_PULSE_WIDTH_ENCODER
TAG_DEBUG
TAG_FIRM_INFO
TAG_FOCUS_STM
TAG_FOCUS_STM_CHANGE_SEGMENT
TAG_FORCE_FAN
TAG_GAIN
TAG_GAIN_CHANGE_SEGMENT
TAG_GAIN_STM
TAG_GAIN_STM_CHANGE_SEGMENT
TAG_MODULATION
TAG_MODULATION_CHANGE_SEGMENT
TAG_PHASE_FILTER
TAG_READS_FPGA_STATE
TAG_SILENCER
TAG_SYNC
TRANS_NUM