autd3_cpu_wire/
cmd.rs

1crate::wire_enum! {
2    pub enum Cmd {
3        Reset = 0x00,
4        Synchronize = 0x01,
5        SetMode = 0x02,
6        Clear = 0x03,
7        Nop = 0x04,
8        WritePatternBuffer = 0x10,
9        ConfigPattern = 0x11,
10        ChangePatternBank = 0x12,
11        WritePatternCompressed = 0x13,
12        WritePatternFused = 0x14,
13        WriteModulationBuffer = 0x20,
14        ConfigModulation = 0x21,
15        ChangeModulationBank = 0x22,
16        WriteModulationFused = 0x23,
17        SetSilencer = 0x30,
18        SetPhaseCorrection = 0x40,
19        SetOutputMask = 0x41,
20        SetPulseWidthTable = 0x42,
21        EmulateGpioIn = 0x50,
22        SetGpioOut = 0x52,
23        ForceFan = 0x60,
24        UpdateBegin = 0x70,
25        UpdateChunk = 0x71,
26        UpdateCommit = 0x72,
27        UpdateActivate = 0x73,
28        UpdateConfirm = 0x74,
29        FpgaUpdateBegin = 0x75,
30        FpgaUpdateChunk = 0x76,
31        FpgaUpdateCommit = 0x77,
32        FpgaUpdateActivate = 0x78,
33        ReadErrorDetail = 0xE0,
34        ReadCpuFwVersionMajor = 0xE1,
35        ReadCpuFwVersionMinor = 0xE2,
36        ReadCpuFwVersionPatch = 0xE3,
37        ReadFpgaFwVersionMajor = 0xE4,
38        ReadFpgaFwVersionMinor = 0xE5,
39        ReadFpgaFwVersionPatch = 0xE6,
40        ReadFpgaState = 0xE7,
41        ReadTelemetry = 0xE8,
42        ReadFpgaFunctions = 0xE9,
43        ReadFpgaBootImage = 0xEA,
44    }
45}
46
47#[cfg(test)]
48mod tests {
49    use super::*;
50
51    #[test]
52    fn cmd_round_trips() {
53        for raw in 0u8..=0xFF {
54            if let Some(c) = Cmd::from_u8(raw) {
55                assert_eq!(c.as_u8(), raw);
56                assert_eq!(Cmd::try_from(raw), Ok(c));
57            } else {
58                assert_eq!(Cmd::try_from(raw), Err(raw));
59            }
60        }
61    }
62}
autd3_cpu_wire/cmd.rs

autd3_cpu_wire/
cmd.rs
