Type Definition atsamv71q20b::gmac::ncfgr::CLK_W

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pub type CLK_W<'a, const O: u8> = FieldWriter<'a, u32, NCFGR_SPEC, u8, CLKSELECT_A, 3, O>;
Expand description

Field CLK writer - MDC CLock Division

Implementations

MCK divided by 8 (MCK up to 20 MHz)

MCK divided by 16 (MCK up to 40 MHz)

MCK divided by 32 (MCK up to 80 MHz)

MCK divided by 48 (MCK up to 120 MHz)

MCK divided by 64 (MCK up to 160 MHz)

MCK divided by 96 (MCK up to 240 MHz)