Struct atsamv71q20b::usbhs::RegisterBlock

#[repr(C)]
pub struct RegisterBlock {

    pub devctrl: DEVCTRL,
    pub devisr: DEVISR,
    pub devicr: DEVICR,
    pub devifr: DEVIFR,
    pub devimr: DEVIMR,
    pub devidr: DEVIDR,
    pub devier: DEVIER,
    pub devept: DEVEPT,
    pub devfnum: DEVFNUM,
    pub deveptcfg: [DEVEPTCFG; 10],
    pub usbhs_devdma: [USBHS_DEVDMA; 7],
    pub hstctrl: HSTCTRL,
    pub hstisr: HSTISR,
    pub hsticr: HSTICR,
    pub hstifr: HSTIFR,
    pub hstimr: HSTIMR,
    pub hstidr: HSTIDR,
    pub hstier: HSTIER,
    pub hstpip: HSTPIP,
    pub hstfnum: HSTFNUM,
    pub hstaddr1: HSTADDR1,
    pub hstaddr2: HSTADDR2,
    pub hstaddr3: HSTADDR3,
    pub hstpipinrq: [HSTPIPINRQ; 10],
    pub hstpiperr: [HSTPIPERR; 10],
    pub usbhs_hstdma: [USBHS_HSTDMA; 7],
    pub ctrl: CTRL,
    pub sr: SR,
    pub scr: SCR,
    pub sfr: SFR,
    /* private fields */
}

Register block

Fields

devctrl: DEVCTRL

0x00 - Device General Control Register

devisr: DEVISR

0x04 - Device Global Interrupt Status Register

devicr: DEVICR

0x08 - Device Global Interrupt Clear Register

devifr: DEVIFR

0x0c - Device Global Interrupt Set Register

devimr: DEVIMR

0x10 - Device Global Interrupt Mask Register

devidr: DEVIDR

0x14 - Device Global Interrupt Disable Register

devier: DEVIER

0x18 - Device Global Interrupt Enable Register

devept: DEVEPT

0x1c - Device Endpoint Register

devfnum: DEVFNUM

0x20 - Device Frame Number Register

deveptcfg: [DEVEPTCFG; 10]

0x100..0x128 - Device Endpoint Configuration Register

usbhs_devdma: [USBHS_DEVDMA; 7]

0x310..0x380 - Device DMA Channel Next Descriptor Address Register

hstctrl: HSTCTRL

0x400 - Host General Control Register

hstisr: HSTISR

0x404 - Host Global Interrupt Status Register

hsticr: HSTICR

0x408 - Host Global Interrupt Clear Register

hstifr: HSTIFR

0x40c - Host Global Interrupt Set Register

hstimr: HSTIMR

0x410 - Host Global Interrupt Mask Register

hstidr: HSTIDR

0x414 - Host Global Interrupt Disable Register

hstier: HSTIER

0x418 - Host Global Interrupt Enable Register

hstpip: HSTPIP

0x41c - Host Pipe Register

hstfnum: HSTFNUM

0x420 - Host Frame Number Register

hstaddr1: HSTADDR1

0x424 - Host Address 1 Register

hstaddr2: HSTADDR2

0x428 - Host Address 2 Register

hstaddr3: HSTADDR3

0x42c - Host Address 3 Register

hstpipinrq: [HSTPIPINRQ; 10]

0x650..0x678 - Host Pipe IN Request Register

hstpiperr: [HSTPIPERR; 10]

0x680..0x6a8 - Host Pipe Error Register

usbhs_hstdma: [USBHS_HSTDMA; 7]

0x710..0x780 - Host DMA Channel Next Descriptor Address Register

ctrl: CTRL

0x800 - General Control Register

sr: SR

0x804 - General Status Register

scr: SCR

0x808 - General Status Clear Register

sfr: SFR

0x80c - General Status Set Register

Implementations

impl RegisterBlock

pub fn deveptisr_intrpt_mode(&self) -> &[DEVEPTISR_INTRPT_MODE; 10]

0x130..0x158 - Device Endpoint Interrupt Status Register

pub fn deveptisr_blk_mode(&self) -> &[DEVEPTISR_BLK_MODE; 10]

0x130..0x158 - Device Endpoint Interrupt Status Register

pub fn deveptisr_iso_mode(&self) -> &[DEVEPTISR_ISO_MODE; 10]

0x130..0x158 - Device Endpoint Interrupt Status Register

pub fn deveptisr_ctrl_mode(&self) -> &[DEVEPTISR_CTRL_MODE; 10]

0x130..0x158 - Device Endpoint Interrupt Status Register

pub fn devepticr_intrpt_mode(&self) -> &[DEVEPTICR_INTRPT_MODE; 10]

0x160..0x188 - Device Endpoint Interrupt Clear Register

pub fn devepticr_blk_mode(&self) -> &[DEVEPTICR_BLK_MODE; 10]

0x160..0x188 - Device Endpoint Interrupt Clear Register

pub fn devepticr_iso_mode(&self) -> &[DEVEPTICR_ISO_MODE; 10]

0x160..0x188 - Device Endpoint Interrupt Clear Register

pub fn devepticr_ctrl_mode(&self) -> &[DEVEPTICR_CTRL_MODE; 10]

0x160..0x188 - Device Endpoint Interrupt Clear Register

pub fn deveptifr_intrpt_mode(&self) -> &[DEVEPTIFR_INTRPT_MODE; 10]

0x190..0x1b8 - Device Endpoint Interrupt Set Register

pub fn deveptifr_blk_mode(&self) -> &[DEVEPTIFR_BLK_MODE; 10]

0x190..0x1b8 - Device Endpoint Interrupt Set Register

pub fn deveptifr_iso_mode(&self) -> &[DEVEPTIFR_ISO_MODE; 10]

0x190..0x1b8 - Device Endpoint Interrupt Set Register

pub fn deveptifr_ctrl_mode(&self) -> &[DEVEPTIFR_CTRL_MODE; 10]

0x190..0x1b8 - Device Endpoint Interrupt Set Register

pub fn deveptimr_intrpt_mode(&self) -> &[DEVEPTIMR_INTRPT_MODE; 10]

0x1c0..0x1e8 - Device Endpoint Interrupt Mask Register

pub fn deveptimr_blk_mode(&self) -> &[DEVEPTIMR_BLK_MODE; 10]

0x1c0..0x1e8 - Device Endpoint Interrupt Mask Register

pub fn deveptimr_iso_mode(&self) -> &[DEVEPTIMR_ISO_MODE; 10]

0x1c0..0x1e8 - Device Endpoint Interrupt Mask Register

pub fn deveptimr_ctrl_mode(&self) -> &[DEVEPTIMR_CTRL_MODE; 10]

0x1c0..0x1e8 - Device Endpoint Interrupt Mask Register

pub fn deveptier_intrpt_mode(&self) -> &[DEVEPTIER_INTRPT_MODE; 10]

0x1f0..0x218 - Device Endpoint Interrupt Enable Register

pub fn deveptier_blk_mode(&self) -> &[DEVEPTIER_BLK_MODE; 10]

0x1f0..0x218 - Device Endpoint Interrupt Enable Register

pub fn deveptier_iso_mode(&self) -> &[DEVEPTIER_ISO_MODE; 10]

0x1f0..0x218 - Device Endpoint Interrupt Enable Register

pub fn deveptier_ctrl_mode(&self) -> &[DEVEPTIER_CTRL_MODE; 10]

0x1f0..0x218 - Device Endpoint Interrupt Enable Register

pub fn deveptidr_intrpt_mode(&self) -> &[DEVEPTIDR_INTRPT_MODE; 10]

0x220..0x248 - Device Endpoint Interrupt Disable Register

pub fn deveptidr_blk_mode(&self) -> &[DEVEPTIDR_BLK_MODE; 10]

0x220..0x248 - Device Endpoint Interrupt Disable Register

pub fn deveptidr_iso_mode(&self) -> &[DEVEPTIDR_ISO_MODE; 10]

0x220..0x248 - Device Endpoint Interrupt Disable Register

pub fn deveptidr_ctrl_mode(&self) -> &[DEVEPTIDR_CTRL_MODE; 10]

0x220..0x248 - Device Endpoint Interrupt Disable Register

pub fn hstpipcfg_ctrl_bulk_mode(&self) -> &[HSTPIPCFG_CTRL_BULK_MODE; 10]

0x500..0x528 - Host Pipe Configuration Register

pub fn hstpipcfg(&self) -> &[HSTPIPCFG; 10]

0x500..0x528 - Host Pipe Configuration Register

pub fn hstpipisr_intrpt_mode(&self) -> &[HSTPIPISR_INTRPT_MODE; 10]

0x530..0x558 - Host Pipe Status Register

pub fn hstpipisr_blk_mode(&self) -> &[HSTPIPISR_BLK_MODE; 10]

0x530..0x558 - Host Pipe Status Register

pub fn hstpipisr_iso_mode(&self) -> &[HSTPIPISR_ISO_MODE; 10]

0x530..0x558 - Host Pipe Status Register

pub fn hstpipisr_ctrl_mode(&self) -> &[HSTPIPISR_CTRL_MODE; 10]

0x530..0x558 - Host Pipe Status Register

pub fn hstpipicr_intrpt_mode(&self) -> &[HSTPIPICR_INTRPT_MODE; 10]

0x560..0x588 - Host Pipe Clear Register

pub fn hstpipicr_blk_mode(&self) -> &[HSTPIPICR_BLK_MODE; 10]

0x560..0x588 - Host Pipe Clear Register

pub fn hstpipicr_iso_mode(&self) -> &[HSTPIPICR_ISO_MODE; 10]

0x560..0x588 - Host Pipe Clear Register

pub fn hstpipicr_ctrl_mode(&self) -> &[HSTPIPICR_CTRL_MODE; 10]

0x560..0x588 - Host Pipe Clear Register

pub fn hstpipifr_intrpt_mode(&self) -> &[HSTPIPIFR_INTRPT_MODE; 10]

0x590..0x5b8 - Host Pipe Set Register

pub fn hstpipifr_blk_mode(&self) -> &[HSTPIPIFR_BLK_MODE; 10]

0x590..0x5b8 - Host Pipe Set Register

pub fn hstpipifr_iso_mode(&self) -> &[HSTPIPIFR_ISO_MODE; 10]

0x590..0x5b8 - Host Pipe Set Register

pub fn hstpipifr_ctrl_mode(&self) -> &[HSTPIPIFR_CTRL_MODE; 10]

0x590..0x5b8 - Host Pipe Set Register

pub fn hstpipimr_intrpt_mode(&self) -> &[HSTPIPIMR_INTRPT_MODE; 10]

0x5c0..0x5e8 - Host Pipe Mask Register

pub fn hstpipimr_blk_mode(&self) -> &[HSTPIPIMR_BLK_MODE; 10]

0x5c0..0x5e8 - Host Pipe Mask Register

pub fn hstpipimr_iso_mode(&self) -> &[HSTPIPIMR_ISO_MODE; 10]

0x5c0..0x5e8 - Host Pipe Mask Register

pub fn hstpipimr_ctrl_mode(&self) -> &[HSTPIPIMR_CTRL_MODE; 10]

0x5c0..0x5e8 - Host Pipe Mask Register

pub fn hstpipier_intrpt_mode(&self) -> &[HSTPIPIER_INTRPT_MODE; 10]

0x5f0..0x618 - Host Pipe Enable Register

pub fn hstpipier_blk_mode(&self) -> &[HSTPIPIER_BLK_MODE; 10]

0x5f0..0x618 - Host Pipe Enable Register

pub fn hstpipier_iso_mode(&self) -> &[HSTPIPIER_ISO_MODE; 10]

0x5f0..0x618 - Host Pipe Enable Register

pub fn hstpipier_ctrl_mode(&self) -> &[HSTPIPIER_CTRL_MODE; 10]

0x5f0..0x618 - Host Pipe Enable Register

pub fn hstpipidr_intrpt_mode(&self) -> &[HSTPIPIDR_INTRPT_MODE; 10]

0x620..0x648 - Host Pipe Disable Register

pub fn hstpipidr_blk_mode(&self) -> &[HSTPIPIDR_BLK_MODE; 10]

0x620..0x648 - Host Pipe Disable Register

pub fn hstpipidr_iso_mode(&self) -> &[HSTPIPIDR_ISO_MODE; 10]

0x620..0x648 - Host Pipe Disable Register

pub fn hstpipidr_ctrl_mode(&self) -> &[HSTPIPIDR_CTRL_MODE; 10]

0x620..0x648 - Host Pipe Disable Register