Struct atsamv71q20::mcan0::mcan_cccr::W

pub struct W(_);

Register MCAN_CCCR writer

Implementations

impl W

pub fn init(&mut self) -> INIT_W<'_>

Bit 0 - Initialization (read/write)

pub fn cce(&mut self) -> CCE_W<'_>

Bit 1 - Configuration Change Enable (read/write, write protection)

pub fn asm(&mut self) -> ASM_W<'_>

Bit 2 - Restricted Operation Mode (read/write, write protection against ‘1’)

pub fn csa(&mut self) -> CSA_W<'_>

Bit 3 - Clock Stop Acknowledge (read-only)

pub fn csr(&mut self) -> CSR_W<'_>

Bit 4 - Clock Stop Request (read/write)

pub fn mon(&mut self) -> MON_W<'_>

Bit 5 - Bus Monitoring Mode (read/write, write protection against ‘1’)

pub fn dar(&mut self) -> DAR_W<'_>

Bit 6 - Disable Automatic Retransmission (read/write, write protection)

pub fn test(&mut self) -> TEST_W<'_>

Bit 7 - Test Mode Enable (read/write, write protection against ‘1’)

pub fn cme(&mut self) -> CME_W<'_>

Bits 8:9 - CAN Mode Enable (read/write, write protection)

pub fn cmr(&mut self) -> CMR_W<'_>

Bits 10:11 - CAN Mode Request (read/write)

pub fn fdo(&mut self) -> FDO_W<'_>

Bit 12 - CAN FD Operation (read-only)

pub fn fdbs(&mut self) -> FDBS_W<'_>

Bit 13 - CAN FD Bit Rate Switching (read-only)

pub fn txp(&mut self) -> TXP_W<'_>

Bit 14 - Transmit Pause (read/write, write protection)

pub unsafe fn bits(&mut self, bits: u32) -> &mut Self

Writes raw bits to the register.

Methods from Deref<Target = W<MCAN_CCCR_SPEC>>

pub unsafe fn bits(&mut self, bits: REG::Ux) -> &mut Self

Writes raw bits to the register.

Trait Implementations

impl Deref for W

type Target = W<MCAN_CCCR_SPEC>

The resulting type after dereferencing.

fn deref(&self) -> &Self::Target

Dereferences the value.

impl DerefMut for W

fn deref_mut(&mut self) -> &mut Self::Target

Mutably dereferences the value.

impl From<W<MCAN_CCCR_SPEC>> for W

fn from(writer: W<MCAN_CCCR_SPEC>) -> Self

Performs the conversion.