#[repr(C)]
pub struct RegisterBlock {
Show 46 fields pub mcan_crel: Reg<MCAN_CREL_SPEC>, pub mcan_endn: Reg<MCAN_ENDN_SPEC>, pub mcan_cust: Reg<MCAN_CUST_SPEC>, pub mcan_fbtp: Reg<MCAN_FBTP_SPEC>, pub mcan_test: Reg<MCAN_TEST_SPEC>, pub mcan_rwd: Reg<MCAN_RWD_SPEC>, pub mcan_cccr: Reg<MCAN_CCCR_SPEC>, pub mcan_btp: Reg<MCAN_BTP_SPEC>, pub mcan_tscc: Reg<MCAN_TSCC_SPEC>, pub mcan_tscv: Reg<MCAN_TSCV_SPEC>, pub mcan_tocc: Reg<MCAN_TOCC_SPEC>, pub mcan_tocv: Reg<MCAN_TOCV_SPEC>, pub mcan_ecr: Reg<MCAN_ECR_SPEC>, pub mcan_psr: Reg<MCAN_PSR_SPEC>, pub mcan_ir: Reg<MCAN_IR_SPEC>, pub mcan_ie: Reg<MCAN_IE_SPEC>, pub mcan_ils: Reg<MCAN_ILS_SPEC>, pub mcan_ile: Reg<MCAN_ILE_SPEC>, pub mcan_gfc: Reg<MCAN_GFC_SPEC>, pub mcan_sidfc: Reg<MCAN_SIDFC_SPEC>, pub mcan_xidfc: Reg<MCAN_XIDFC_SPEC>, pub mcan_xidam: Reg<MCAN_XIDAM_SPEC>, pub mcan_hpms: Reg<MCAN_HPMS_SPEC>, pub mcan_ndat1: Reg<MCAN_NDAT1_SPEC>, pub mcan_ndat2: Reg<MCAN_NDAT2_SPEC>, pub mcan_rxf0c: Reg<MCAN_RXF0C_SPEC>, pub mcan_rxf0s: Reg<MCAN_RXF0S_SPEC>, pub mcan_rxf0a: Reg<MCAN_RXF0A_SPEC>, pub mcan_rxbc: Reg<MCAN_RXBC_SPEC>, pub mcan_rxf1c: Reg<MCAN_RXF1C_SPEC>, pub mcan_rxf1s: Reg<MCAN_RXF1S_SPEC>, pub mcan_rxf1a: Reg<MCAN_RXF1A_SPEC>, pub mcan_rxesc: Reg<MCAN_RXESC_SPEC>, pub mcan_txbc: Reg<MCAN_TXBC_SPEC>, pub mcan_txfqs: Reg<MCAN_TXFQS_SPEC>, pub mcan_txesc: Reg<MCAN_TXESC_SPEC>, pub mcan_txbrp: Reg<MCAN_TXBRP_SPEC>, pub mcan_txbar: Reg<MCAN_TXBAR_SPEC>, pub mcan_txbcr: Reg<MCAN_TXBCR_SPEC>, pub mcan_txbto: Reg<MCAN_TXBTO_SPEC>, pub mcan_txbcf: Reg<MCAN_TXBCF_SPEC>, pub mcan_txbtie: Reg<MCAN_TXBTIE_SPEC>, pub mcan_txbcie: Reg<MCAN_TXBCIE_SPEC>, pub mcan_txefc: Reg<MCAN_TXEFC_SPEC>, pub mcan_txefs: Reg<MCAN_TXEFS_SPEC>, pub mcan_txefa: Reg<MCAN_TXEFA_SPEC>, /* private fields */
}
Expand description

Register block

Fields

mcan_crel: Reg<MCAN_CREL_SPEC>

0x00 - Core Release Register

mcan_endn: Reg<MCAN_ENDN_SPEC>

0x04 - Endian Register

mcan_cust: Reg<MCAN_CUST_SPEC>

0x08 - Customer Register

mcan_fbtp: Reg<MCAN_FBTP_SPEC>

0x0c - Fast Bit Timing and Prescaler Register

mcan_test: Reg<MCAN_TEST_SPEC>

0x10 - Test Register

mcan_rwd: Reg<MCAN_RWD_SPEC>

0x14 - RAM Watchdog Register

mcan_cccr: Reg<MCAN_CCCR_SPEC>

0x18 - CC Control Register

mcan_btp: Reg<MCAN_BTP_SPEC>

0x1c - Bit Timing and Prescaler Register

mcan_tscc: Reg<MCAN_TSCC_SPEC>

0x20 - Timestamp Counter Configuration Register

mcan_tscv: Reg<MCAN_TSCV_SPEC>

0x24 - Timestamp Counter Value Register

mcan_tocc: Reg<MCAN_TOCC_SPEC>

0x28 - Timeout Counter Configuration Register

mcan_tocv: Reg<MCAN_TOCV_SPEC>

0x2c - Timeout Counter Value Register

mcan_ecr: Reg<MCAN_ECR_SPEC>

0x40 - Error Counter Register

mcan_psr: Reg<MCAN_PSR_SPEC>

0x44 - Protocol Status Register

mcan_ir: Reg<MCAN_IR_SPEC>

0x50 - Interrupt Register

mcan_ie: Reg<MCAN_IE_SPEC>

0x54 - Interrupt Enable Register

mcan_ils: Reg<MCAN_ILS_SPEC>

0x58 - Interrupt Line Select Register

mcan_ile: Reg<MCAN_ILE_SPEC>

0x5c - Interrupt Line Enable Register

mcan_gfc: Reg<MCAN_GFC_SPEC>

0x80 - Global Filter Configuration Register

mcan_sidfc: Reg<MCAN_SIDFC_SPEC>

0x84 - Standard ID Filter Configuration Register

mcan_xidfc: Reg<MCAN_XIDFC_SPEC>

0x88 - Extended ID Filter Configuration Register

mcan_xidam: Reg<MCAN_XIDAM_SPEC>

0x90 - Extended ID AND Mask Register

mcan_hpms: Reg<MCAN_HPMS_SPEC>

0x94 - High Priority Message Status Register

mcan_ndat1: Reg<MCAN_NDAT1_SPEC>

0x98 - New Data 1 Register

mcan_ndat2: Reg<MCAN_NDAT2_SPEC>

0x9c - New Data 2 Register

mcan_rxf0c: Reg<MCAN_RXF0C_SPEC>

0xa0 - Receive FIFO 0 Configuration Register

mcan_rxf0s: Reg<MCAN_RXF0S_SPEC>

0xa4 - Receive FIFO 0 Status Register

mcan_rxf0a: Reg<MCAN_RXF0A_SPEC>

0xa8 - Receive FIFO 0 Acknowledge Register

mcan_rxbc: Reg<MCAN_RXBC_SPEC>

0xac - Receive Rx Buffer Configuration Register

mcan_rxf1c: Reg<MCAN_RXF1C_SPEC>

0xb0 - Receive FIFO 1 Configuration Register

mcan_rxf1s: Reg<MCAN_RXF1S_SPEC>

0xb4 - Receive FIFO 1 Status Register

mcan_rxf1a: Reg<MCAN_RXF1A_SPEC>

0xb8 - Receive FIFO 1 Acknowledge Register

mcan_rxesc: Reg<MCAN_RXESC_SPEC>

0xbc - Receive Buffer / FIFO Element Size Configuration Register

mcan_txbc: Reg<MCAN_TXBC_SPEC>

0xc0 - Transmit Buffer Configuration Register

mcan_txfqs: Reg<MCAN_TXFQS_SPEC>

0xc4 - Transmit FIFO/Queue Status Register

mcan_txesc: Reg<MCAN_TXESC_SPEC>

0xc8 - Transmit Buffer Element Size Configuration Register

mcan_txbrp: Reg<MCAN_TXBRP_SPEC>

0xcc - Transmit Buffer Request Pending Register

mcan_txbar: Reg<MCAN_TXBAR_SPEC>

0xd0 - Transmit Buffer Add Request Register

mcan_txbcr: Reg<MCAN_TXBCR_SPEC>

0xd4 - Transmit Buffer Cancellation Request Register

mcan_txbto: Reg<MCAN_TXBTO_SPEC>

0xd8 - Transmit Buffer Transmission Occurred Register

mcan_txbcf: Reg<MCAN_TXBCF_SPEC>

0xdc - Transmit Buffer Cancellation Finished Register

mcan_txbtie: Reg<MCAN_TXBTIE_SPEC>

0xe0 - Transmit Buffer Transmission Interrupt Enable Register

mcan_txbcie: Reg<MCAN_TXBCIE_SPEC>

0xe4 - Transmit Buffer Cancellation Finished Interrupt Enable Register

mcan_txefc: Reg<MCAN_TXEFC_SPEC>

0xf0 - Transmit Event FIFO Configuration Register

mcan_txefs: Reg<MCAN_TXEFS_SPEC>

0xf4 - Transmit Event FIFO Status Register

mcan_txefa: Reg<MCAN_TXEFA_SPEC>

0xf8 - Transmit Event FIFO Acknowledge Register

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Calls U::from(self).

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The type returned in the event of a conversion error.

Performs the conversion.

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Performs the conversion.