Module atsamv71q20::twihs0
source · [−]Expand description
Two-wire Interface High Speed
Modules
Control Register
Clock Waveform Generator Register
Debug Register
Filter Register
Internal Address Register
Interrupt Disable Register
Interrupt Enable Register
Interrupt Mask Register
Master Mode Register
Receive Holding Register
SMBus Timing Register
Slave Mode Register
Status Register
SleepWalking Matching Register
Transmit Holding Register
Version Register
Write Protection Mode Register
Write Protection Status Register
Structs
Register block
Type Definitions
TWIHS_CR register accessor: an alias for Reg<TWIHS_CR_SPEC>
TWIHS_CWGR register accessor: an alias for Reg<TWIHS_CWGR_SPEC>
TWIHS_DR register accessor: an alias for Reg<TWIHS_DR_SPEC>
TWIHS_FILTR register accessor: an alias for Reg<TWIHS_FILTR_SPEC>
TWIHS_IADR register accessor: an alias for Reg<TWIHS_IADR_SPEC>
TWIHS_IDR register accessor: an alias for Reg<TWIHS_IDR_SPEC>
TWIHS_IER register accessor: an alias for Reg<TWIHS_IER_SPEC>
TWIHS_IMR register accessor: an alias for Reg<TWIHS_IMR_SPEC>
TWIHS_MMR register accessor: an alias for Reg<TWIHS_MMR_SPEC>
TWIHS_RHR register accessor: an alias for Reg<TWIHS_RHR_SPEC>
TWIHS_SMBTR register accessor: an alias for Reg<TWIHS_SMBTR_SPEC>
TWIHS_SMR register accessor: an alias for Reg<TWIHS_SMR_SPEC>
TWIHS_SR register accessor: an alias for Reg<TWIHS_SR_SPEC>
TWIHS_SWMR register accessor: an alias for Reg<TWIHS_SWMR_SPEC>
TWIHS_THR register accessor: an alias for Reg<TWIHS_THR_SPEC>
TWIHS_VER register accessor: an alias for Reg<TWIHS_VER_SPEC>
TWIHS_WPMR register accessor: an alias for Reg<TWIHS_WPMR_SPEC>
TWIHS_WPSR register accessor: an alias for Reg<TWIHS_WPSR_SPEC>