atsamv71n21/uart0/
uart_mr.rs1#[doc = "Register `UART_MR` reader"]
2pub struct R(crate::R<UART_MR_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<UART_MR_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<UART_MR_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<UART_MR_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `UART_MR` writer"]
17pub struct W(crate::W<UART_MR_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<UART_MR_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<UART_MR_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<UART_MR_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Receiver Digital Filter\n\nValue on reset: 0"]
38#[derive(Clone, Copy, Debug, PartialEq)]
39pub enum FILTER_A {
40 #[doc = "0: UART does not filter the receive line."]
41 DISABLED = 0,
42 #[doc = "1: UART filters the receive line using a three-sample filter (16x-bit clock) (2 over 3 majority)."]
43 ENABLED = 1,
44}
45impl From<FILTER_A> for bool {
46 #[inline(always)]
47 fn from(variant: FILTER_A) -> Self {
48 variant as u8 != 0
49 }
50}
51#[doc = "Field `FILTER` reader - Receiver Digital Filter"]
52pub struct FILTER_R(crate::FieldReader<bool, FILTER_A>);
53impl FILTER_R {
54 #[inline(always)]
55 pub(crate) fn new(bits: bool) -> Self {
56 FILTER_R(crate::FieldReader::new(bits))
57 }
58 #[doc = r"Get enumerated values variant"]
59 #[inline(always)]
60 pub fn variant(&self) -> FILTER_A {
61 match self.bits {
62 false => FILTER_A::DISABLED,
63 true => FILTER_A::ENABLED,
64 }
65 }
66 #[doc = "Checks if the value of the field is `DISABLED`"]
67 #[inline(always)]
68 pub fn is_disabled(&self) -> bool {
69 **self == FILTER_A::DISABLED
70 }
71 #[doc = "Checks if the value of the field is `ENABLED`"]
72 #[inline(always)]
73 pub fn is_enabled(&self) -> bool {
74 **self == FILTER_A::ENABLED
75 }
76}
77impl core::ops::Deref for FILTER_R {
78 type Target = crate::FieldReader<bool, FILTER_A>;
79 #[inline(always)]
80 fn deref(&self) -> &Self::Target {
81 &self.0
82 }
83}
84#[doc = "Field `FILTER` writer - Receiver Digital Filter"]
85pub struct FILTER_W<'a> {
86 w: &'a mut W,
87}
88impl<'a> FILTER_W<'a> {
89 #[doc = r"Writes `variant` to the field"]
90 #[inline(always)]
91 pub fn variant(self, variant: FILTER_A) -> &'a mut W {
92 self.bit(variant.into())
93 }
94 #[doc = "UART does not filter the receive line."]
95 #[inline(always)]
96 pub fn disabled(self) -> &'a mut W {
97 self.variant(FILTER_A::DISABLED)
98 }
99 #[doc = "UART filters the receive line using a three-sample filter (16x-bit clock) (2 over 3 majority)."]
100 #[inline(always)]
101 pub fn enabled(self) -> &'a mut W {
102 self.variant(FILTER_A::ENABLED)
103 }
104 #[doc = r"Sets the field bit"]
105 #[inline(always)]
106 pub fn set_bit(self) -> &'a mut W {
107 self.bit(true)
108 }
109 #[doc = r"Clears the field bit"]
110 #[inline(always)]
111 pub fn clear_bit(self) -> &'a mut W {
112 self.bit(false)
113 }
114 #[doc = r"Writes raw bits to the field"]
115 #[inline(always)]
116 pub fn bit(self, value: bool) -> &'a mut W {
117 self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4);
118 self.w
119 }
120}
121#[doc = "Parity Type\n\nValue on reset: 0"]
122#[derive(Clone, Copy, Debug, PartialEq)]
123#[repr(u8)]
124pub enum PAR_A {
125 #[doc = "0: Even Parity"]
126 EVEN = 0,
127 #[doc = "1: Odd Parity"]
128 ODD = 1,
129 #[doc = "2: Space: parity forced to 0"]
130 SPACE = 2,
131 #[doc = "3: Mark: parity forced to 1"]
132 MARK = 3,
133 #[doc = "4: No parity"]
134 NO = 4,
135}
136impl From<PAR_A> for u8 {
137 #[inline(always)]
138 fn from(variant: PAR_A) -> Self {
139 variant as _
140 }
141}
142#[doc = "Field `PAR` reader - Parity Type"]
143pub struct PAR_R(crate::FieldReader<u8, PAR_A>);
144impl PAR_R {
145 #[inline(always)]
146 pub(crate) fn new(bits: u8) -> Self {
147 PAR_R(crate::FieldReader::new(bits))
148 }
149 #[doc = r"Get enumerated values variant"]
150 #[inline(always)]
151 pub fn variant(&self) -> Option<PAR_A> {
152 match self.bits {
153 0 => Some(PAR_A::EVEN),
154 1 => Some(PAR_A::ODD),
155 2 => Some(PAR_A::SPACE),
156 3 => Some(PAR_A::MARK),
157 4 => Some(PAR_A::NO),
158 _ => None,
159 }
160 }
161 #[doc = "Checks if the value of the field is `EVEN`"]
162 #[inline(always)]
163 pub fn is_even(&self) -> bool {
164 **self == PAR_A::EVEN
165 }
166 #[doc = "Checks if the value of the field is `ODD`"]
167 #[inline(always)]
168 pub fn is_odd(&self) -> bool {
169 **self == PAR_A::ODD
170 }
171 #[doc = "Checks if the value of the field is `SPACE`"]
172 #[inline(always)]
173 pub fn is_space(&self) -> bool {
174 **self == PAR_A::SPACE
175 }
176 #[doc = "Checks if the value of the field is `MARK`"]
177 #[inline(always)]
178 pub fn is_mark(&self) -> bool {
179 **self == PAR_A::MARK
180 }
181 #[doc = "Checks if the value of the field is `NO`"]
182 #[inline(always)]
183 pub fn is_no(&self) -> bool {
184 **self == PAR_A::NO
185 }
186}
187impl core::ops::Deref for PAR_R {
188 type Target = crate::FieldReader<u8, PAR_A>;
189 #[inline(always)]
190 fn deref(&self) -> &Self::Target {
191 &self.0
192 }
193}
194#[doc = "Field `PAR` writer - Parity Type"]
195pub struct PAR_W<'a> {
196 w: &'a mut W,
197}
198impl<'a> PAR_W<'a> {
199 #[doc = r"Writes `variant` to the field"]
200 #[inline(always)]
201 pub fn variant(self, variant: PAR_A) -> &'a mut W {
202 unsafe { self.bits(variant.into()) }
203 }
204 #[doc = "Even Parity"]
205 #[inline(always)]
206 pub fn even(self) -> &'a mut W {
207 self.variant(PAR_A::EVEN)
208 }
209 #[doc = "Odd Parity"]
210 #[inline(always)]
211 pub fn odd(self) -> &'a mut W {
212 self.variant(PAR_A::ODD)
213 }
214 #[doc = "Space: parity forced to 0"]
215 #[inline(always)]
216 pub fn space(self) -> &'a mut W {
217 self.variant(PAR_A::SPACE)
218 }
219 #[doc = "Mark: parity forced to 1"]
220 #[inline(always)]
221 pub fn mark(self) -> &'a mut W {
222 self.variant(PAR_A::MARK)
223 }
224 #[doc = "No parity"]
225 #[inline(always)]
226 pub fn no(self) -> &'a mut W {
227 self.variant(PAR_A::NO)
228 }
229 #[doc = r"Writes raw bits to the field"]
230 #[inline(always)]
231 pub unsafe fn bits(self, value: u8) -> &'a mut W {
232 self.w.bits = (self.w.bits & !(0x07 << 9)) | ((value as u32 & 0x07) << 9);
233 self.w
234 }
235}
236#[doc = "Baud Rate Source Clock\n\nValue on reset: 0"]
237#[derive(Clone, Copy, Debug, PartialEq)]
238pub enum BRSRCCK_A {
239 #[doc = "0: The baud rate is driven by the peripheral clock"]
240 PERIPH_CLK = 0,
241 #[doc = "1: The baud rate is driven by a PMC-programmable clock PCK (see section Power Management Controller (PMC))."]
242 PMC_PCK = 1,
243}
244impl From<BRSRCCK_A> for bool {
245 #[inline(always)]
246 fn from(variant: BRSRCCK_A) -> Self {
247 variant as u8 != 0
248 }
249}
250#[doc = "Field `BRSRCCK` reader - Baud Rate Source Clock"]
251pub struct BRSRCCK_R(crate::FieldReader<bool, BRSRCCK_A>);
252impl BRSRCCK_R {
253 #[inline(always)]
254 pub(crate) fn new(bits: bool) -> Self {
255 BRSRCCK_R(crate::FieldReader::new(bits))
256 }
257 #[doc = r"Get enumerated values variant"]
258 #[inline(always)]
259 pub fn variant(&self) -> BRSRCCK_A {
260 match self.bits {
261 false => BRSRCCK_A::PERIPH_CLK,
262 true => BRSRCCK_A::PMC_PCK,
263 }
264 }
265 #[doc = "Checks if the value of the field is `PERIPH_CLK`"]
266 #[inline(always)]
267 pub fn is_periph_clk(&self) -> bool {
268 **self == BRSRCCK_A::PERIPH_CLK
269 }
270 #[doc = "Checks if the value of the field is `PMC_PCK`"]
271 #[inline(always)]
272 pub fn is_pmc_pck(&self) -> bool {
273 **self == BRSRCCK_A::PMC_PCK
274 }
275}
276impl core::ops::Deref for BRSRCCK_R {
277 type Target = crate::FieldReader<bool, BRSRCCK_A>;
278 #[inline(always)]
279 fn deref(&self) -> &Self::Target {
280 &self.0
281 }
282}
283#[doc = "Field `BRSRCCK` writer - Baud Rate Source Clock"]
284pub struct BRSRCCK_W<'a> {
285 w: &'a mut W,
286}
287impl<'a> BRSRCCK_W<'a> {
288 #[doc = r"Writes `variant` to the field"]
289 #[inline(always)]
290 pub fn variant(self, variant: BRSRCCK_A) -> &'a mut W {
291 self.bit(variant.into())
292 }
293 #[doc = "The baud rate is driven by the peripheral clock"]
294 #[inline(always)]
295 pub fn periph_clk(self) -> &'a mut W {
296 self.variant(BRSRCCK_A::PERIPH_CLK)
297 }
298 #[doc = "The baud rate is driven by a PMC-programmable clock PCK (see section Power Management Controller (PMC))."]
299 #[inline(always)]
300 pub fn pmc_pck(self) -> &'a mut W {
301 self.variant(BRSRCCK_A::PMC_PCK)
302 }
303 #[doc = r"Sets the field bit"]
304 #[inline(always)]
305 pub fn set_bit(self) -> &'a mut W {
306 self.bit(true)
307 }
308 #[doc = r"Clears the field bit"]
309 #[inline(always)]
310 pub fn clear_bit(self) -> &'a mut W {
311 self.bit(false)
312 }
313 #[doc = r"Writes raw bits to the field"]
314 #[inline(always)]
315 pub fn bit(self, value: bool) -> &'a mut W {
316 self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12);
317 self.w
318 }
319}
320#[doc = "Channel Mode\n\nValue on reset: 0"]
321#[derive(Clone, Copy, Debug, PartialEq)]
322#[repr(u8)]
323pub enum CHMODE_A {
324 #[doc = "0: Normal mode"]
325 NORMAL = 0,
326 #[doc = "1: Automatic echo"]
327 AUTOMATIC = 1,
328 #[doc = "2: Local loopback"]
329 LOCAL_LOOPBACK = 2,
330 #[doc = "3: Remote loopback"]
331 REMOTE_LOOPBACK = 3,
332}
333impl From<CHMODE_A> for u8 {
334 #[inline(always)]
335 fn from(variant: CHMODE_A) -> Self {
336 variant as _
337 }
338}
339#[doc = "Field `CHMODE` reader - Channel Mode"]
340pub struct CHMODE_R(crate::FieldReader<u8, CHMODE_A>);
341impl CHMODE_R {
342 #[inline(always)]
343 pub(crate) fn new(bits: u8) -> Self {
344 CHMODE_R(crate::FieldReader::new(bits))
345 }
346 #[doc = r"Get enumerated values variant"]
347 #[inline(always)]
348 pub fn variant(&self) -> CHMODE_A {
349 match self.bits {
350 0 => CHMODE_A::NORMAL,
351 1 => CHMODE_A::AUTOMATIC,
352 2 => CHMODE_A::LOCAL_LOOPBACK,
353 3 => CHMODE_A::REMOTE_LOOPBACK,
354 _ => unreachable!(),
355 }
356 }
357 #[doc = "Checks if the value of the field is `NORMAL`"]
358 #[inline(always)]
359 pub fn is_normal(&self) -> bool {
360 **self == CHMODE_A::NORMAL
361 }
362 #[doc = "Checks if the value of the field is `AUTOMATIC`"]
363 #[inline(always)]
364 pub fn is_automatic(&self) -> bool {
365 **self == CHMODE_A::AUTOMATIC
366 }
367 #[doc = "Checks if the value of the field is `LOCAL_LOOPBACK`"]
368 #[inline(always)]
369 pub fn is_local_loopback(&self) -> bool {
370 **self == CHMODE_A::LOCAL_LOOPBACK
371 }
372 #[doc = "Checks if the value of the field is `REMOTE_LOOPBACK`"]
373 #[inline(always)]
374 pub fn is_remote_loopback(&self) -> bool {
375 **self == CHMODE_A::REMOTE_LOOPBACK
376 }
377}
378impl core::ops::Deref for CHMODE_R {
379 type Target = crate::FieldReader<u8, CHMODE_A>;
380 #[inline(always)]
381 fn deref(&self) -> &Self::Target {
382 &self.0
383 }
384}
385#[doc = "Field `CHMODE` writer - Channel Mode"]
386pub struct CHMODE_W<'a> {
387 w: &'a mut W,
388}
389impl<'a> CHMODE_W<'a> {
390 #[doc = r"Writes `variant` to the field"]
391 #[inline(always)]
392 pub fn variant(self, variant: CHMODE_A) -> &'a mut W {
393 self.bits(variant.into())
394 }
395 #[doc = "Normal mode"]
396 #[inline(always)]
397 pub fn normal(self) -> &'a mut W {
398 self.variant(CHMODE_A::NORMAL)
399 }
400 #[doc = "Automatic echo"]
401 #[inline(always)]
402 pub fn automatic(self) -> &'a mut W {
403 self.variant(CHMODE_A::AUTOMATIC)
404 }
405 #[doc = "Local loopback"]
406 #[inline(always)]
407 pub fn local_loopback(self) -> &'a mut W {
408 self.variant(CHMODE_A::LOCAL_LOOPBACK)
409 }
410 #[doc = "Remote loopback"]
411 #[inline(always)]
412 pub fn remote_loopback(self) -> &'a mut W {
413 self.variant(CHMODE_A::REMOTE_LOOPBACK)
414 }
415 #[doc = r"Writes raw bits to the field"]
416 #[inline(always)]
417 pub fn bits(self, value: u8) -> &'a mut W {
418 self.w.bits = (self.w.bits & !(0x03 << 14)) | ((value as u32 & 0x03) << 14);
419 self.w
420 }
421}
422impl R {
423 #[doc = "Bit 4 - Receiver Digital Filter"]
424 #[inline(always)]
425 pub fn filter(&self) -> FILTER_R {
426 FILTER_R::new(((self.bits >> 4) & 0x01) != 0)
427 }
428 #[doc = "Bits 9:11 - Parity Type"]
429 #[inline(always)]
430 pub fn par(&self) -> PAR_R {
431 PAR_R::new(((self.bits >> 9) & 0x07) as u8)
432 }
433 #[doc = "Bit 12 - Baud Rate Source Clock"]
434 #[inline(always)]
435 pub fn brsrcck(&self) -> BRSRCCK_R {
436 BRSRCCK_R::new(((self.bits >> 12) & 0x01) != 0)
437 }
438 #[doc = "Bits 14:15 - Channel Mode"]
439 #[inline(always)]
440 pub fn chmode(&self) -> CHMODE_R {
441 CHMODE_R::new(((self.bits >> 14) & 0x03) as u8)
442 }
443}
444impl W {
445 #[doc = "Bit 4 - Receiver Digital Filter"]
446 #[inline(always)]
447 pub fn filter(&mut self) -> FILTER_W {
448 FILTER_W { w: self }
449 }
450 #[doc = "Bits 9:11 - Parity Type"]
451 #[inline(always)]
452 pub fn par(&mut self) -> PAR_W {
453 PAR_W { w: self }
454 }
455 #[doc = "Bit 12 - Baud Rate Source Clock"]
456 #[inline(always)]
457 pub fn brsrcck(&mut self) -> BRSRCCK_W {
458 BRSRCCK_W { w: self }
459 }
460 #[doc = "Bits 14:15 - Channel Mode"]
461 #[inline(always)]
462 pub fn chmode(&mut self) -> CHMODE_W {
463 CHMODE_W { w: self }
464 }
465 #[doc = "Writes raw bits to the register."]
466 #[inline(always)]
467 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
468 self.0.bits(bits);
469 self
470 }
471}
472#[doc = "Mode Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [uart_mr](index.html) module"]
473pub struct UART_MR_SPEC;
474impl crate::RegisterSpec for UART_MR_SPEC {
475 type Ux = u32;
476}
477#[doc = "`read()` method returns [uart_mr::R](R) reader structure"]
478impl crate::Readable for UART_MR_SPEC {
479 type Reader = R;
480}
481#[doc = "`write(|w| ..)` method takes [uart_mr::W](W) writer structure"]
482impl crate::Writable for UART_MR_SPEC {
483 type Writer = W;
484}
485#[doc = "`reset()` method sets UART_MR to value 0"]
486impl crate::Resettable for UART_MR_SPEC {
487 #[inline(always)]
488 fn reset_value() -> Self::Ux {
489 0
490 }
491}