atsamv71n21/mcan0/
mcan_fbtp.rs

1#[doc = "Register `MCAN_FBTP` reader"]
2pub struct R(crate::R<MCAN_FBTP_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<MCAN_FBTP_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<MCAN_FBTP_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<MCAN_FBTP_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `MCAN_FBTP` writer"]
17pub struct W(crate::W<MCAN_FBTP_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<MCAN_FBTP_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<MCAN_FBTP_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<MCAN_FBTP_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `FSJW` reader - Fast (Re) Synchronization Jump Width"]
38pub struct FSJW_R(crate::FieldReader<u8, u8>);
39impl FSJW_R {
40    #[inline(always)]
41    pub(crate) fn new(bits: u8) -> Self {
42        FSJW_R(crate::FieldReader::new(bits))
43    }
44}
45impl core::ops::Deref for FSJW_R {
46    type Target = crate::FieldReader<u8, u8>;
47    #[inline(always)]
48    fn deref(&self) -> &Self::Target {
49        &self.0
50    }
51}
52#[doc = "Field `FSJW` writer - Fast (Re) Synchronization Jump Width"]
53pub struct FSJW_W<'a> {
54    w: &'a mut W,
55}
56impl<'a> FSJW_W<'a> {
57    #[doc = r"Writes raw bits to the field"]
58    #[inline(always)]
59    pub unsafe fn bits(self, value: u8) -> &'a mut W {
60        self.w.bits = (self.w.bits & !0x03) | (value as u32 & 0x03);
61        self.w
62    }
63}
64#[doc = "Field `FTSEG2` reader - Fast Time Segment After Sample Point"]
65pub struct FTSEG2_R(crate::FieldReader<u8, u8>);
66impl FTSEG2_R {
67    #[inline(always)]
68    pub(crate) fn new(bits: u8) -> Self {
69        FTSEG2_R(crate::FieldReader::new(bits))
70    }
71}
72impl core::ops::Deref for FTSEG2_R {
73    type Target = crate::FieldReader<u8, u8>;
74    #[inline(always)]
75    fn deref(&self) -> &Self::Target {
76        &self.0
77    }
78}
79#[doc = "Field `FTSEG2` writer - Fast Time Segment After Sample Point"]
80pub struct FTSEG2_W<'a> {
81    w: &'a mut W,
82}
83impl<'a> FTSEG2_W<'a> {
84    #[doc = r"Writes raw bits to the field"]
85    #[inline(always)]
86    pub unsafe fn bits(self, value: u8) -> &'a mut W {
87        self.w.bits = (self.w.bits & !(0x07 << 4)) | ((value as u32 & 0x07) << 4);
88        self.w
89    }
90}
91#[doc = "Field `FTSEG1` reader - Fast Time Segment Before Sample Point"]
92pub struct FTSEG1_R(crate::FieldReader<u8, u8>);
93impl FTSEG1_R {
94    #[inline(always)]
95    pub(crate) fn new(bits: u8) -> Self {
96        FTSEG1_R(crate::FieldReader::new(bits))
97    }
98}
99impl core::ops::Deref for FTSEG1_R {
100    type Target = crate::FieldReader<u8, u8>;
101    #[inline(always)]
102    fn deref(&self) -> &Self::Target {
103        &self.0
104    }
105}
106#[doc = "Field `FTSEG1` writer - Fast Time Segment Before Sample Point"]
107pub struct FTSEG1_W<'a> {
108    w: &'a mut W,
109}
110impl<'a> FTSEG1_W<'a> {
111    #[doc = r"Writes raw bits to the field"]
112    #[inline(always)]
113    pub unsafe fn bits(self, value: u8) -> &'a mut W {
114        self.w.bits = (self.w.bits & !(0x0f << 8)) | ((value as u32 & 0x0f) << 8);
115        self.w
116    }
117}
118#[doc = "Field `FBRP` reader - Fast Baud Rate Prescaler"]
119pub struct FBRP_R(crate::FieldReader<u8, u8>);
120impl FBRP_R {
121    #[inline(always)]
122    pub(crate) fn new(bits: u8) -> Self {
123        FBRP_R(crate::FieldReader::new(bits))
124    }
125}
126impl core::ops::Deref for FBRP_R {
127    type Target = crate::FieldReader<u8, u8>;
128    #[inline(always)]
129    fn deref(&self) -> &Self::Target {
130        &self.0
131    }
132}
133#[doc = "Field `FBRP` writer - Fast Baud Rate Prescaler"]
134pub struct FBRP_W<'a> {
135    w: &'a mut W,
136}
137impl<'a> FBRP_W<'a> {
138    #[doc = r"Writes raw bits to the field"]
139    #[inline(always)]
140    pub unsafe fn bits(self, value: u8) -> &'a mut W {
141        self.w.bits = (self.w.bits & !(0x1f << 16)) | ((value as u32 & 0x1f) << 16);
142        self.w
143    }
144}
145#[doc = "Transceiver Delay Compensation\n\nValue on reset: 0"]
146#[derive(Clone, Copy, Debug, PartialEq)]
147pub enum TDC_A {
148    #[doc = "0: Transceiver Delay Compensation disabled."]
149    DISABLED = 0,
150    #[doc = "1: Transceiver Delay Compensation enabled."]
151    ENABLED = 1,
152}
153impl From<TDC_A> for bool {
154    #[inline(always)]
155    fn from(variant: TDC_A) -> Self {
156        variant as u8 != 0
157    }
158}
159#[doc = "Field `TDC` reader - Transceiver Delay Compensation"]
160pub struct TDC_R(crate::FieldReader<bool, TDC_A>);
161impl TDC_R {
162    #[inline(always)]
163    pub(crate) fn new(bits: bool) -> Self {
164        TDC_R(crate::FieldReader::new(bits))
165    }
166    #[doc = r"Get enumerated values variant"]
167    #[inline(always)]
168    pub fn variant(&self) -> TDC_A {
169        match self.bits {
170            false => TDC_A::DISABLED,
171            true => TDC_A::ENABLED,
172        }
173    }
174    #[doc = "Checks if the value of the field is `DISABLED`"]
175    #[inline(always)]
176    pub fn is_disabled(&self) -> bool {
177        **self == TDC_A::DISABLED
178    }
179    #[doc = "Checks if the value of the field is `ENABLED`"]
180    #[inline(always)]
181    pub fn is_enabled(&self) -> bool {
182        **self == TDC_A::ENABLED
183    }
184}
185impl core::ops::Deref for TDC_R {
186    type Target = crate::FieldReader<bool, TDC_A>;
187    #[inline(always)]
188    fn deref(&self) -> &Self::Target {
189        &self.0
190    }
191}
192#[doc = "Field `TDC` writer - Transceiver Delay Compensation"]
193pub struct TDC_W<'a> {
194    w: &'a mut W,
195}
196impl<'a> TDC_W<'a> {
197    #[doc = r"Writes `variant` to the field"]
198    #[inline(always)]
199    pub fn variant(self, variant: TDC_A) -> &'a mut W {
200        self.bit(variant.into())
201    }
202    #[doc = "Transceiver Delay Compensation disabled."]
203    #[inline(always)]
204    pub fn disabled(self) -> &'a mut W {
205        self.variant(TDC_A::DISABLED)
206    }
207    #[doc = "Transceiver Delay Compensation enabled."]
208    #[inline(always)]
209    pub fn enabled(self) -> &'a mut W {
210        self.variant(TDC_A::ENABLED)
211    }
212    #[doc = r"Sets the field bit"]
213    #[inline(always)]
214    pub fn set_bit(self) -> &'a mut W {
215        self.bit(true)
216    }
217    #[doc = r"Clears the field bit"]
218    #[inline(always)]
219    pub fn clear_bit(self) -> &'a mut W {
220        self.bit(false)
221    }
222    #[doc = r"Writes raw bits to the field"]
223    #[inline(always)]
224    pub fn bit(self, value: bool) -> &'a mut W {
225        self.w.bits = (self.w.bits & !(0x01 << 23)) | ((value as u32 & 0x01) << 23);
226        self.w
227    }
228}
229#[doc = "Field `TDCO` reader - Transceiver Delay Compensation Offset"]
230pub struct TDCO_R(crate::FieldReader<u8, u8>);
231impl TDCO_R {
232    #[inline(always)]
233    pub(crate) fn new(bits: u8) -> Self {
234        TDCO_R(crate::FieldReader::new(bits))
235    }
236}
237impl core::ops::Deref for TDCO_R {
238    type Target = crate::FieldReader<u8, u8>;
239    #[inline(always)]
240    fn deref(&self) -> &Self::Target {
241        &self.0
242    }
243}
244#[doc = "Field `TDCO` writer - Transceiver Delay Compensation Offset"]
245pub struct TDCO_W<'a> {
246    w: &'a mut W,
247}
248impl<'a> TDCO_W<'a> {
249    #[doc = r"Writes raw bits to the field"]
250    #[inline(always)]
251    pub unsafe fn bits(self, value: u8) -> &'a mut W {
252        self.w.bits = (self.w.bits & !(0x1f << 24)) | ((value as u32 & 0x1f) << 24);
253        self.w
254    }
255}
256impl R {
257    #[doc = "Bits 0:1 - Fast (Re) Synchronization Jump Width"]
258    #[inline(always)]
259    pub fn fsjw(&self) -> FSJW_R {
260        FSJW_R::new((self.bits & 0x03) as u8)
261    }
262    #[doc = "Bits 4:6 - Fast Time Segment After Sample Point"]
263    #[inline(always)]
264    pub fn ftseg2(&self) -> FTSEG2_R {
265        FTSEG2_R::new(((self.bits >> 4) & 0x07) as u8)
266    }
267    #[doc = "Bits 8:11 - Fast Time Segment Before Sample Point"]
268    #[inline(always)]
269    pub fn ftseg1(&self) -> FTSEG1_R {
270        FTSEG1_R::new(((self.bits >> 8) & 0x0f) as u8)
271    }
272    #[doc = "Bits 16:20 - Fast Baud Rate Prescaler"]
273    #[inline(always)]
274    pub fn fbrp(&self) -> FBRP_R {
275        FBRP_R::new(((self.bits >> 16) & 0x1f) as u8)
276    }
277    #[doc = "Bit 23 - Transceiver Delay Compensation"]
278    #[inline(always)]
279    pub fn tdc(&self) -> TDC_R {
280        TDC_R::new(((self.bits >> 23) & 0x01) != 0)
281    }
282    #[doc = "Bits 24:28 - Transceiver Delay Compensation Offset"]
283    #[inline(always)]
284    pub fn tdco(&self) -> TDCO_R {
285        TDCO_R::new(((self.bits >> 24) & 0x1f) as u8)
286    }
287}
288impl W {
289    #[doc = "Bits 0:1 - Fast (Re) Synchronization Jump Width"]
290    #[inline(always)]
291    pub fn fsjw(&mut self) -> FSJW_W {
292        FSJW_W { w: self }
293    }
294    #[doc = "Bits 4:6 - Fast Time Segment After Sample Point"]
295    #[inline(always)]
296    pub fn ftseg2(&mut self) -> FTSEG2_W {
297        FTSEG2_W { w: self }
298    }
299    #[doc = "Bits 8:11 - Fast Time Segment Before Sample Point"]
300    #[inline(always)]
301    pub fn ftseg1(&mut self) -> FTSEG1_W {
302        FTSEG1_W { w: self }
303    }
304    #[doc = "Bits 16:20 - Fast Baud Rate Prescaler"]
305    #[inline(always)]
306    pub fn fbrp(&mut self) -> FBRP_W {
307        FBRP_W { w: self }
308    }
309    #[doc = "Bit 23 - Transceiver Delay Compensation"]
310    #[inline(always)]
311    pub fn tdc(&mut self) -> TDC_W {
312        TDC_W { w: self }
313    }
314    #[doc = "Bits 24:28 - Transceiver Delay Compensation Offset"]
315    #[inline(always)]
316    pub fn tdco(&mut self) -> TDCO_W {
317        TDCO_W { w: self }
318    }
319    #[doc = "Writes raw bits to the register."]
320    #[inline(always)]
321    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
322        self.0.bits(bits);
323        self
324    }
325}
326#[doc = "Fast Bit Timing and Prescaler Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [mcan_fbtp](index.html) module"]
327pub struct MCAN_FBTP_SPEC;
328impl crate::RegisterSpec for MCAN_FBTP_SPEC {
329    type Ux = u32;
330}
331#[doc = "`read()` method returns [mcan_fbtp::R](R) reader structure"]
332impl crate::Readable for MCAN_FBTP_SPEC {
333    type Reader = R;
334}
335#[doc = "`write(|w| ..)` method takes [mcan_fbtp::W](W) writer structure"]
336impl crate::Writable for MCAN_FBTP_SPEC {
337    type Writer = W;
338}
339#[doc = "`reset()` method sets MCAN_FBTP to value 0"]
340impl crate::Resettable for MCAN_FBTP_SPEC {
341    #[inline(always)]
342    fn reset_value() -> Self::Ux {
343        0
344    }
345}
atsamv71n21/mcan0/mcan_fbtp.rs

atsamv71n21/mcan0/
mcan_fbtp.rs
