atsamv71n21/utmi/
utmi_ohciicr.rs

1#[doc = "Register `UTMI_OHCIICR` reader"]
2pub struct R(crate::R<UTMI_OHCIICR_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<UTMI_OHCIICR_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<UTMI_OHCIICR_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<UTMI_OHCIICR_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `UTMI_OHCIICR` writer"]
17pub struct W(crate::W<UTMI_OHCIICR_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<UTMI_OHCIICR_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<UTMI_OHCIICR_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<UTMI_OHCIICR_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `RES0` reader - USB PORTx Reset"]
38pub struct RES0_R(crate::FieldReader<bool, bool>);
39impl RES0_R {
40    #[inline(always)]
41    pub(crate) fn new(bits: bool) -> Self {
42        RES0_R(crate::FieldReader::new(bits))
43    }
44}
45impl core::ops::Deref for RES0_R {
46    type Target = crate::FieldReader<bool, bool>;
47    #[inline(always)]
48    fn deref(&self) -> &Self::Target {
49        &self.0
50    }
51}
52#[doc = "Field `RES0` writer - USB PORTx Reset"]
53pub struct RES0_W<'a> {
54    w: &'a mut W,
55}
56impl<'a> RES0_W<'a> {
57    #[doc = r"Sets the field bit"]
58    #[inline(always)]
59    pub fn set_bit(self) -> &'a mut W {
60        self.bit(true)
61    }
62    #[doc = r"Clears the field bit"]
63    #[inline(always)]
64    pub fn clear_bit(self) -> &'a mut W {
65        self.bit(false)
66    }
67    #[doc = r"Writes raw bits to the field"]
68    #[inline(always)]
69    pub fn bit(self, value: bool) -> &'a mut W {
70        self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01);
71        self.w
72    }
73}
74#[doc = "Field `ARIE` reader - OHCI Asynchronous Resume Interrupt Enable"]
75pub struct ARIE_R(crate::FieldReader<bool, bool>);
76impl ARIE_R {
77    #[inline(always)]
78    pub(crate) fn new(bits: bool) -> Self {
79        ARIE_R(crate::FieldReader::new(bits))
80    }
81}
82impl core::ops::Deref for ARIE_R {
83    type Target = crate::FieldReader<bool, bool>;
84    #[inline(always)]
85    fn deref(&self) -> &Self::Target {
86        &self.0
87    }
88}
89#[doc = "Field `ARIE` writer - OHCI Asynchronous Resume Interrupt Enable"]
90pub struct ARIE_W<'a> {
91    w: &'a mut W,
92}
93impl<'a> ARIE_W<'a> {
94    #[doc = r"Sets the field bit"]
95    #[inline(always)]
96    pub fn set_bit(self) -> &'a mut W {
97        self.bit(true)
98    }
99    #[doc = r"Clears the field bit"]
100    #[inline(always)]
101    pub fn clear_bit(self) -> &'a mut W {
102        self.bit(false)
103    }
104    #[doc = r"Writes raw bits to the field"]
105    #[inline(always)]
106    pub fn bit(self, value: bool) -> &'a mut W {
107        self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4);
108        self.w
109    }
110}
111#[doc = "Field `APPSTART` reader - "]
112pub struct APPSTART_R(crate::FieldReader<bool, bool>);
113impl APPSTART_R {
114    #[inline(always)]
115    pub(crate) fn new(bits: bool) -> Self {
116        APPSTART_R(crate::FieldReader::new(bits))
117    }
118}
119impl core::ops::Deref for APPSTART_R {
120    type Target = crate::FieldReader<bool, bool>;
121    #[inline(always)]
122    fn deref(&self) -> &Self::Target {
123        &self.0
124    }
125}
126#[doc = "Field `APPSTART` writer - "]
127pub struct APPSTART_W<'a> {
128    w: &'a mut W,
129}
130impl<'a> APPSTART_W<'a> {
131    #[doc = r"Sets the field bit"]
132    #[inline(always)]
133    pub fn set_bit(self) -> &'a mut W {
134        self.bit(true)
135    }
136    #[doc = r"Clears the field bit"]
137    #[inline(always)]
138    pub fn clear_bit(self) -> &'a mut W {
139        self.bit(false)
140    }
141    #[doc = r"Writes raw bits to the field"]
142    #[inline(always)]
143    pub fn bit(self, value: bool) -> &'a mut W {
144        self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5);
145        self.w
146    }
147}
148#[doc = "Field `UDPPUDIS` reader - USB Device Pull-up Disable"]
149pub struct UDPPUDIS_R(crate::FieldReader<bool, bool>);
150impl UDPPUDIS_R {
151    #[inline(always)]
152    pub(crate) fn new(bits: bool) -> Self {
153        UDPPUDIS_R(crate::FieldReader::new(bits))
154    }
155}
156impl core::ops::Deref for UDPPUDIS_R {
157    type Target = crate::FieldReader<bool, bool>;
158    #[inline(always)]
159    fn deref(&self) -> &Self::Target {
160        &self.0
161    }
162}
163#[doc = "Field `UDPPUDIS` writer - USB Device Pull-up Disable"]
164pub struct UDPPUDIS_W<'a> {
165    w: &'a mut W,
166}
167impl<'a> UDPPUDIS_W<'a> {
168    #[doc = r"Sets the field bit"]
169    #[inline(always)]
170    pub fn set_bit(self) -> &'a mut W {
171        self.bit(true)
172    }
173    #[doc = r"Clears the field bit"]
174    #[inline(always)]
175    pub fn clear_bit(self) -> &'a mut W {
176        self.bit(false)
177    }
178    #[doc = r"Writes raw bits to the field"]
179    #[inline(always)]
180    pub fn bit(self, value: bool) -> &'a mut W {
181        self.w.bits = (self.w.bits & !(0x01 << 23)) | ((value as u32 & 0x01) << 23);
182        self.w
183    }
184}
185impl R {
186    #[doc = "Bit 0 - USB PORTx Reset"]
187    #[inline(always)]
188    pub fn res0(&self) -> RES0_R {
189        RES0_R::new((self.bits & 0x01) != 0)
190    }
191    #[doc = "Bit 4 - OHCI Asynchronous Resume Interrupt Enable"]
192    #[inline(always)]
193    pub fn arie(&self) -> ARIE_R {
194        ARIE_R::new(((self.bits >> 4) & 0x01) != 0)
195    }
196    #[doc = "Bit 5"]
197    #[inline(always)]
198    pub fn appstart(&self) -> APPSTART_R {
199        APPSTART_R::new(((self.bits >> 5) & 0x01) != 0)
200    }
201    #[doc = "Bit 23 - USB Device Pull-up Disable"]
202    #[inline(always)]
203    pub fn udppudis(&self) -> UDPPUDIS_R {
204        UDPPUDIS_R::new(((self.bits >> 23) & 0x01) != 0)
205    }
206}
207impl W {
208    #[doc = "Bit 0 - USB PORTx Reset"]
209    #[inline(always)]
210    pub fn res0(&mut self) -> RES0_W {
211        RES0_W { w: self }
212    }
213    #[doc = "Bit 4 - OHCI Asynchronous Resume Interrupt Enable"]
214    #[inline(always)]
215    pub fn arie(&mut self) -> ARIE_W {
216        ARIE_W { w: self }
217    }
218    #[doc = "Bit 5"]
219    #[inline(always)]
220    pub fn appstart(&mut self) -> APPSTART_W {
221        APPSTART_W { w: self }
222    }
223    #[doc = "Bit 23 - USB Device Pull-up Disable"]
224    #[inline(always)]
225    pub fn udppudis(&mut self) -> UDPPUDIS_W {
226        UDPPUDIS_W { w: self }
227    }
228    #[doc = "Writes raw bits to the register."]
229    #[inline(always)]
230    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
231        self.0.bits(bits);
232        self
233    }
234}
235#[doc = "OHCI Interrupt Configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [utmi_ohciicr](index.html) module"]
236pub struct UTMI_OHCIICR_SPEC;
237impl crate::RegisterSpec for UTMI_OHCIICR_SPEC {
238    type Ux = u32;
239}
240#[doc = "`read()` method returns [utmi_ohciicr::R](R) reader structure"]
241impl crate::Readable for UTMI_OHCIICR_SPEC {
242    type Reader = R;
243}
244#[doc = "`write(|w| ..)` method takes [utmi_ohciicr::W](W) writer structure"]
245impl crate::Writable for UTMI_OHCIICR_SPEC {
246    type Writer = W;
247}
248#[doc = "`reset()` method sets UTMI_OHCIICR to value 0"]
249impl crate::Resettable for UTMI_OHCIICR_SPEC {
250    #[inline(always)]
251    fn reset_value() -> Self::Ux {
252        0
253    }
254}
atsamv71n21/utmi/utmi_ohciicr.rs

atsamv71n21/utmi/
utmi_ohciicr.rs
