atsams70q21/usbhs/
usbhs_devidr.rs

1#[doc = "Register `USBHS_DEVIDR` writer"]
2pub struct W(crate::W<USBHS_DEVIDR_SPEC>);
3impl core::ops::Deref for W {
4    type Target = crate::W<USBHS_DEVIDR_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl core::ops::DerefMut for W {
11    #[inline(always)]
12    fn deref_mut(&mut self) -> &mut Self::Target {
13        &mut self.0
14    }
15}
16impl From<crate::W<USBHS_DEVIDR_SPEC>> for W {
17    #[inline(always)]
18    fn from(writer: crate::W<USBHS_DEVIDR_SPEC>) -> Self {
19        W(writer)
20    }
21}
22#[doc = "Field `SUSPEC` writer - Suspend Interrupt Disable"]
23pub struct SUSPEC_W<'a> {
24    w: &'a mut W,
25}
26impl<'a> SUSPEC_W<'a> {
27    #[doc = r"Sets the field bit"]
28    #[inline(always)]
29    pub fn set_bit(self) -> &'a mut W {
30        self.bit(true)
31    }
32    #[doc = r"Clears the field bit"]
33    #[inline(always)]
34    pub fn clear_bit(self) -> &'a mut W {
35        self.bit(false)
36    }
37    #[doc = r"Writes raw bits to the field"]
38    #[inline(always)]
39    pub fn bit(self, value: bool) -> &'a mut W {
40        self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01);
41        self.w
42    }
43}
44#[doc = "Field `MSOFEC` writer - Micro Start of Frame Interrupt Disable"]
45pub struct MSOFEC_W<'a> {
46    w: &'a mut W,
47}
48impl<'a> MSOFEC_W<'a> {
49    #[doc = r"Sets the field bit"]
50    #[inline(always)]
51    pub fn set_bit(self) -> &'a mut W {
52        self.bit(true)
53    }
54    #[doc = r"Clears the field bit"]
55    #[inline(always)]
56    pub fn clear_bit(self) -> &'a mut W {
57        self.bit(false)
58    }
59    #[doc = r"Writes raw bits to the field"]
60    #[inline(always)]
61    pub fn bit(self, value: bool) -> &'a mut W {
62        self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1);
63        self.w
64    }
65}
66#[doc = "Field `SOFEC` writer - Start of Frame Interrupt Disable"]
67pub struct SOFEC_W<'a> {
68    w: &'a mut W,
69}
70impl<'a> SOFEC_W<'a> {
71    #[doc = r"Sets the field bit"]
72    #[inline(always)]
73    pub fn set_bit(self) -> &'a mut W {
74        self.bit(true)
75    }
76    #[doc = r"Clears the field bit"]
77    #[inline(always)]
78    pub fn clear_bit(self) -> &'a mut W {
79        self.bit(false)
80    }
81    #[doc = r"Writes raw bits to the field"]
82    #[inline(always)]
83    pub fn bit(self, value: bool) -> &'a mut W {
84        self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2);
85        self.w
86    }
87}
88#[doc = "Field `EORSTEC` writer - End of Reset Interrupt Disable"]
89pub struct EORSTEC_W<'a> {
90    w: &'a mut W,
91}
92impl<'a> EORSTEC_W<'a> {
93    #[doc = r"Sets the field bit"]
94    #[inline(always)]
95    pub fn set_bit(self) -> &'a mut W {
96        self.bit(true)
97    }
98    #[doc = r"Clears the field bit"]
99    #[inline(always)]
100    pub fn clear_bit(self) -> &'a mut W {
101        self.bit(false)
102    }
103    #[doc = r"Writes raw bits to the field"]
104    #[inline(always)]
105    pub fn bit(self, value: bool) -> &'a mut W {
106        self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3);
107        self.w
108    }
109}
110#[doc = "Field `WAKEUPEC` writer - Wake-Up Interrupt Disable"]
111pub struct WAKEUPEC_W<'a> {
112    w: &'a mut W,
113}
114impl<'a> WAKEUPEC_W<'a> {
115    #[doc = r"Sets the field bit"]
116    #[inline(always)]
117    pub fn set_bit(self) -> &'a mut W {
118        self.bit(true)
119    }
120    #[doc = r"Clears the field bit"]
121    #[inline(always)]
122    pub fn clear_bit(self) -> &'a mut W {
123        self.bit(false)
124    }
125    #[doc = r"Writes raw bits to the field"]
126    #[inline(always)]
127    pub fn bit(self, value: bool) -> &'a mut W {
128        self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4);
129        self.w
130    }
131}
132#[doc = "Field `EORSMEC` writer - End of Resume Interrupt Disable"]
133pub struct EORSMEC_W<'a> {
134    w: &'a mut W,
135}
136impl<'a> EORSMEC_W<'a> {
137    #[doc = r"Sets the field bit"]
138    #[inline(always)]
139    pub fn set_bit(self) -> &'a mut W {
140        self.bit(true)
141    }
142    #[doc = r"Clears the field bit"]
143    #[inline(always)]
144    pub fn clear_bit(self) -> &'a mut W {
145        self.bit(false)
146    }
147    #[doc = r"Writes raw bits to the field"]
148    #[inline(always)]
149    pub fn bit(self, value: bool) -> &'a mut W {
150        self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5);
151        self.w
152    }
153}
154#[doc = "Field `UPRSMEC` writer - Upstream Resume Interrupt Disable"]
155pub struct UPRSMEC_W<'a> {
156    w: &'a mut W,
157}
158impl<'a> UPRSMEC_W<'a> {
159    #[doc = r"Sets the field bit"]
160    #[inline(always)]
161    pub fn set_bit(self) -> &'a mut W {
162        self.bit(true)
163    }
164    #[doc = r"Clears the field bit"]
165    #[inline(always)]
166    pub fn clear_bit(self) -> &'a mut W {
167        self.bit(false)
168    }
169    #[doc = r"Writes raw bits to the field"]
170    #[inline(always)]
171    pub fn bit(self, value: bool) -> &'a mut W {
172        self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6);
173        self.w
174    }
175}
176#[doc = "Field `PEP_0` writer - Endpoint 0 Interrupt Disable"]
177pub struct PEP_0_W<'a> {
178    w: &'a mut W,
179}
180impl<'a> PEP_0_W<'a> {
181    #[doc = r"Sets the field bit"]
182    #[inline(always)]
183    pub fn set_bit(self) -> &'a mut W {
184        self.bit(true)
185    }
186    #[doc = r"Clears the field bit"]
187    #[inline(always)]
188    pub fn clear_bit(self) -> &'a mut W {
189        self.bit(false)
190    }
191    #[doc = r"Writes raw bits to the field"]
192    #[inline(always)]
193    pub fn bit(self, value: bool) -> &'a mut W {
194        self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12);
195        self.w
196    }
197}
198#[doc = "Field `PEP_1` writer - Endpoint 1 Interrupt Disable"]
199pub struct PEP_1_W<'a> {
200    w: &'a mut W,
201}
202impl<'a> PEP_1_W<'a> {
203    #[doc = r"Sets the field bit"]
204    #[inline(always)]
205    pub fn set_bit(self) -> &'a mut W {
206        self.bit(true)
207    }
208    #[doc = r"Clears the field bit"]
209    #[inline(always)]
210    pub fn clear_bit(self) -> &'a mut W {
211        self.bit(false)
212    }
213    #[doc = r"Writes raw bits to the field"]
214    #[inline(always)]
215    pub fn bit(self, value: bool) -> &'a mut W {
216        self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13);
217        self.w
218    }
219}
220#[doc = "Field `PEP_2` writer - Endpoint 2 Interrupt Disable"]
221pub struct PEP_2_W<'a> {
222    w: &'a mut W,
223}
224impl<'a> PEP_2_W<'a> {
225    #[doc = r"Sets the field bit"]
226    #[inline(always)]
227    pub fn set_bit(self) -> &'a mut W {
228        self.bit(true)
229    }
230    #[doc = r"Clears the field bit"]
231    #[inline(always)]
232    pub fn clear_bit(self) -> &'a mut W {
233        self.bit(false)
234    }
235    #[doc = r"Writes raw bits to the field"]
236    #[inline(always)]
237    pub fn bit(self, value: bool) -> &'a mut W {
238        self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14);
239        self.w
240    }
241}
242#[doc = "Field `PEP_3` writer - Endpoint 3 Interrupt Disable"]
243pub struct PEP_3_W<'a> {
244    w: &'a mut W,
245}
246impl<'a> PEP_3_W<'a> {
247    #[doc = r"Sets the field bit"]
248    #[inline(always)]
249    pub fn set_bit(self) -> &'a mut W {
250        self.bit(true)
251    }
252    #[doc = r"Clears the field bit"]
253    #[inline(always)]
254    pub fn clear_bit(self) -> &'a mut W {
255        self.bit(false)
256    }
257    #[doc = r"Writes raw bits to the field"]
258    #[inline(always)]
259    pub fn bit(self, value: bool) -> &'a mut W {
260        self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15);
261        self.w
262    }
263}
264#[doc = "Field `PEP_4` writer - Endpoint 4 Interrupt Disable"]
265pub struct PEP_4_W<'a> {
266    w: &'a mut W,
267}
268impl<'a> PEP_4_W<'a> {
269    #[doc = r"Sets the field bit"]
270    #[inline(always)]
271    pub fn set_bit(self) -> &'a mut W {
272        self.bit(true)
273    }
274    #[doc = r"Clears the field bit"]
275    #[inline(always)]
276    pub fn clear_bit(self) -> &'a mut W {
277        self.bit(false)
278    }
279    #[doc = r"Writes raw bits to the field"]
280    #[inline(always)]
281    pub fn bit(self, value: bool) -> &'a mut W {
282        self.w.bits = (self.w.bits & !(0x01 << 16)) | ((value as u32 & 0x01) << 16);
283        self.w
284    }
285}
286#[doc = "Field `PEP_5` writer - Endpoint 5 Interrupt Disable"]
287pub struct PEP_5_W<'a> {
288    w: &'a mut W,
289}
290impl<'a> PEP_5_W<'a> {
291    #[doc = r"Sets the field bit"]
292    #[inline(always)]
293    pub fn set_bit(self) -> &'a mut W {
294        self.bit(true)
295    }
296    #[doc = r"Clears the field bit"]
297    #[inline(always)]
298    pub fn clear_bit(self) -> &'a mut W {
299        self.bit(false)
300    }
301    #[doc = r"Writes raw bits to the field"]
302    #[inline(always)]
303    pub fn bit(self, value: bool) -> &'a mut W {
304        self.w.bits = (self.w.bits & !(0x01 << 17)) | ((value as u32 & 0x01) << 17);
305        self.w
306    }
307}
308#[doc = "Field `PEP_6` writer - Endpoint 6 Interrupt Disable"]
309pub struct PEP_6_W<'a> {
310    w: &'a mut W,
311}
312impl<'a> PEP_6_W<'a> {
313    #[doc = r"Sets the field bit"]
314    #[inline(always)]
315    pub fn set_bit(self) -> &'a mut W {
316        self.bit(true)
317    }
318    #[doc = r"Clears the field bit"]
319    #[inline(always)]
320    pub fn clear_bit(self) -> &'a mut W {
321        self.bit(false)
322    }
323    #[doc = r"Writes raw bits to the field"]
324    #[inline(always)]
325    pub fn bit(self, value: bool) -> &'a mut W {
326        self.w.bits = (self.w.bits & !(0x01 << 18)) | ((value as u32 & 0x01) << 18);
327        self.w
328    }
329}
330#[doc = "Field `PEP_7` writer - Endpoint 7 Interrupt Disable"]
331pub struct PEP_7_W<'a> {
332    w: &'a mut W,
333}
334impl<'a> PEP_7_W<'a> {
335    #[doc = r"Sets the field bit"]
336    #[inline(always)]
337    pub fn set_bit(self) -> &'a mut W {
338        self.bit(true)
339    }
340    #[doc = r"Clears the field bit"]
341    #[inline(always)]
342    pub fn clear_bit(self) -> &'a mut W {
343        self.bit(false)
344    }
345    #[doc = r"Writes raw bits to the field"]
346    #[inline(always)]
347    pub fn bit(self, value: bool) -> &'a mut W {
348        self.w.bits = (self.w.bits & !(0x01 << 19)) | ((value as u32 & 0x01) << 19);
349        self.w
350    }
351}
352#[doc = "Field `PEP_8` writer - Endpoint 8 Interrupt Disable"]
353pub struct PEP_8_W<'a> {
354    w: &'a mut W,
355}
356impl<'a> PEP_8_W<'a> {
357    #[doc = r"Sets the field bit"]
358    #[inline(always)]
359    pub fn set_bit(self) -> &'a mut W {
360        self.bit(true)
361    }
362    #[doc = r"Clears the field bit"]
363    #[inline(always)]
364    pub fn clear_bit(self) -> &'a mut W {
365        self.bit(false)
366    }
367    #[doc = r"Writes raw bits to the field"]
368    #[inline(always)]
369    pub fn bit(self, value: bool) -> &'a mut W {
370        self.w.bits = (self.w.bits & !(0x01 << 20)) | ((value as u32 & 0x01) << 20);
371        self.w
372    }
373}
374#[doc = "Field `PEP_9` writer - Endpoint 9 Interrupt Disable"]
375pub struct PEP_9_W<'a> {
376    w: &'a mut W,
377}
378impl<'a> PEP_9_W<'a> {
379    #[doc = r"Sets the field bit"]
380    #[inline(always)]
381    pub fn set_bit(self) -> &'a mut W {
382        self.bit(true)
383    }
384    #[doc = r"Clears the field bit"]
385    #[inline(always)]
386    pub fn clear_bit(self) -> &'a mut W {
387        self.bit(false)
388    }
389    #[doc = r"Writes raw bits to the field"]
390    #[inline(always)]
391    pub fn bit(self, value: bool) -> &'a mut W {
392        self.w.bits = (self.w.bits & !(0x01 << 21)) | ((value as u32 & 0x01) << 21);
393        self.w
394    }
395}
396#[doc = "Field `PEP_10` writer - Endpoint 10 Interrupt Disable"]
397pub struct PEP_10_W<'a> {
398    w: &'a mut W,
399}
400impl<'a> PEP_10_W<'a> {
401    #[doc = r"Sets the field bit"]
402    #[inline(always)]
403    pub fn set_bit(self) -> &'a mut W {
404        self.bit(true)
405    }
406    #[doc = r"Clears the field bit"]
407    #[inline(always)]
408    pub fn clear_bit(self) -> &'a mut W {
409        self.bit(false)
410    }
411    #[doc = r"Writes raw bits to the field"]
412    #[inline(always)]
413    pub fn bit(self, value: bool) -> &'a mut W {
414        self.w.bits = (self.w.bits & !(0x01 << 22)) | ((value as u32 & 0x01) << 22);
415        self.w
416    }
417}
418#[doc = "Field `PEP_11` writer - Endpoint 11 Interrupt Disable"]
419pub struct PEP_11_W<'a> {
420    w: &'a mut W,
421}
422impl<'a> PEP_11_W<'a> {
423    #[doc = r"Sets the field bit"]
424    #[inline(always)]
425    pub fn set_bit(self) -> &'a mut W {
426        self.bit(true)
427    }
428    #[doc = r"Clears the field bit"]
429    #[inline(always)]
430    pub fn clear_bit(self) -> &'a mut W {
431        self.bit(false)
432    }
433    #[doc = r"Writes raw bits to the field"]
434    #[inline(always)]
435    pub fn bit(self, value: bool) -> &'a mut W {
436        self.w.bits = (self.w.bits & !(0x01 << 23)) | ((value as u32 & 0x01) << 23);
437        self.w
438    }
439}
440#[doc = "Field `DMA_1` writer - DMA Channel 1 Interrupt Disable"]
441pub struct DMA_1_W<'a> {
442    w: &'a mut W,
443}
444impl<'a> DMA_1_W<'a> {
445    #[doc = r"Sets the field bit"]
446    #[inline(always)]
447    pub fn set_bit(self) -> &'a mut W {
448        self.bit(true)
449    }
450    #[doc = r"Clears the field bit"]
451    #[inline(always)]
452    pub fn clear_bit(self) -> &'a mut W {
453        self.bit(false)
454    }
455    #[doc = r"Writes raw bits to the field"]
456    #[inline(always)]
457    pub fn bit(self, value: bool) -> &'a mut W {
458        self.w.bits = (self.w.bits & !(0x01 << 25)) | ((value as u32 & 0x01) << 25);
459        self.w
460    }
461}
462#[doc = "Field `DMA_2` writer - DMA Channel 2 Interrupt Disable"]
463pub struct DMA_2_W<'a> {
464    w: &'a mut W,
465}
466impl<'a> DMA_2_W<'a> {
467    #[doc = r"Sets the field bit"]
468    #[inline(always)]
469    pub fn set_bit(self) -> &'a mut W {
470        self.bit(true)
471    }
472    #[doc = r"Clears the field bit"]
473    #[inline(always)]
474    pub fn clear_bit(self) -> &'a mut W {
475        self.bit(false)
476    }
477    #[doc = r"Writes raw bits to the field"]
478    #[inline(always)]
479    pub fn bit(self, value: bool) -> &'a mut W {
480        self.w.bits = (self.w.bits & !(0x01 << 26)) | ((value as u32 & 0x01) << 26);
481        self.w
482    }
483}
484#[doc = "Field `DMA_3` writer - DMA Channel 3 Interrupt Disable"]
485pub struct DMA_3_W<'a> {
486    w: &'a mut W,
487}
488impl<'a> DMA_3_W<'a> {
489    #[doc = r"Sets the field bit"]
490    #[inline(always)]
491    pub fn set_bit(self) -> &'a mut W {
492        self.bit(true)
493    }
494    #[doc = r"Clears the field bit"]
495    #[inline(always)]
496    pub fn clear_bit(self) -> &'a mut W {
497        self.bit(false)
498    }
499    #[doc = r"Writes raw bits to the field"]
500    #[inline(always)]
501    pub fn bit(self, value: bool) -> &'a mut W {
502        self.w.bits = (self.w.bits & !(0x01 << 27)) | ((value as u32 & 0x01) << 27);
503        self.w
504    }
505}
506#[doc = "Field `DMA_4` writer - DMA Channel 4 Interrupt Disable"]
507pub struct DMA_4_W<'a> {
508    w: &'a mut W,
509}
510impl<'a> DMA_4_W<'a> {
511    #[doc = r"Sets the field bit"]
512    #[inline(always)]
513    pub fn set_bit(self) -> &'a mut W {
514        self.bit(true)
515    }
516    #[doc = r"Clears the field bit"]
517    #[inline(always)]
518    pub fn clear_bit(self) -> &'a mut W {
519        self.bit(false)
520    }
521    #[doc = r"Writes raw bits to the field"]
522    #[inline(always)]
523    pub fn bit(self, value: bool) -> &'a mut W {
524        self.w.bits = (self.w.bits & !(0x01 << 28)) | ((value as u32 & 0x01) << 28);
525        self.w
526    }
527}
528#[doc = "Field `DMA_5` writer - DMA Channel 5 Interrupt Disable"]
529pub struct DMA_5_W<'a> {
530    w: &'a mut W,
531}
532impl<'a> DMA_5_W<'a> {
533    #[doc = r"Sets the field bit"]
534    #[inline(always)]
535    pub fn set_bit(self) -> &'a mut W {
536        self.bit(true)
537    }
538    #[doc = r"Clears the field bit"]
539    #[inline(always)]
540    pub fn clear_bit(self) -> &'a mut W {
541        self.bit(false)
542    }
543    #[doc = r"Writes raw bits to the field"]
544    #[inline(always)]
545    pub fn bit(self, value: bool) -> &'a mut W {
546        self.w.bits = (self.w.bits & !(0x01 << 29)) | ((value as u32 & 0x01) << 29);
547        self.w
548    }
549}
550#[doc = "Field `DMA_6` writer - DMA Channel 6 Interrupt Disable"]
551pub struct DMA_6_W<'a> {
552    w: &'a mut W,
553}
554impl<'a> DMA_6_W<'a> {
555    #[doc = r"Sets the field bit"]
556    #[inline(always)]
557    pub fn set_bit(self) -> &'a mut W {
558        self.bit(true)
559    }
560    #[doc = r"Clears the field bit"]
561    #[inline(always)]
562    pub fn clear_bit(self) -> &'a mut W {
563        self.bit(false)
564    }
565    #[doc = r"Writes raw bits to the field"]
566    #[inline(always)]
567    pub fn bit(self, value: bool) -> &'a mut W {
568        self.w.bits = (self.w.bits & !(0x01 << 30)) | ((value as u32 & 0x01) << 30);
569        self.w
570    }
571}
572#[doc = "Field `DMA_7` writer - DMA Channel 7 Interrupt Disable"]
573pub struct DMA_7_W<'a> {
574    w: &'a mut W,
575}
576impl<'a> DMA_7_W<'a> {
577    #[doc = r"Sets the field bit"]
578    #[inline(always)]
579    pub fn set_bit(self) -> &'a mut W {
580        self.bit(true)
581    }
582    #[doc = r"Clears the field bit"]
583    #[inline(always)]
584    pub fn clear_bit(self) -> &'a mut W {
585        self.bit(false)
586    }
587    #[doc = r"Writes raw bits to the field"]
588    #[inline(always)]
589    pub fn bit(self, value: bool) -> &'a mut W {
590        self.w.bits = (self.w.bits & !(0x01 << 31)) | ((value as u32 & 0x01) << 31);
591        self.w
592    }
593}
594impl W {
595    #[doc = "Bit 0 - Suspend Interrupt Disable"]
596    #[inline(always)]
597    pub fn suspec(&mut self) -> SUSPEC_W {
598        SUSPEC_W { w: self }
599    }
600    #[doc = "Bit 1 - Micro Start of Frame Interrupt Disable"]
601    #[inline(always)]
602    pub fn msofec(&mut self) -> MSOFEC_W {
603        MSOFEC_W { w: self }
604    }
605    #[doc = "Bit 2 - Start of Frame Interrupt Disable"]
606    #[inline(always)]
607    pub fn sofec(&mut self) -> SOFEC_W {
608        SOFEC_W { w: self }
609    }
610    #[doc = "Bit 3 - End of Reset Interrupt Disable"]
611    #[inline(always)]
612    pub fn eorstec(&mut self) -> EORSTEC_W {
613        EORSTEC_W { w: self }
614    }
615    #[doc = "Bit 4 - Wake-Up Interrupt Disable"]
616    #[inline(always)]
617    pub fn wakeupec(&mut self) -> WAKEUPEC_W {
618        WAKEUPEC_W { w: self }
619    }
620    #[doc = "Bit 5 - End of Resume Interrupt Disable"]
621    #[inline(always)]
622    pub fn eorsmec(&mut self) -> EORSMEC_W {
623        EORSMEC_W { w: self }
624    }
625    #[doc = "Bit 6 - Upstream Resume Interrupt Disable"]
626    #[inline(always)]
627    pub fn uprsmec(&mut self) -> UPRSMEC_W {
628        UPRSMEC_W { w: self }
629    }
630    #[doc = "Bit 12 - Endpoint 0 Interrupt Disable"]
631    #[inline(always)]
632    pub fn pep_0(&mut self) -> PEP_0_W {
633        PEP_0_W { w: self }
634    }
635    #[doc = "Bit 13 - Endpoint 1 Interrupt Disable"]
636    #[inline(always)]
637    pub fn pep_1(&mut self) -> PEP_1_W {
638        PEP_1_W { w: self }
639    }
640    #[doc = "Bit 14 - Endpoint 2 Interrupt Disable"]
641    #[inline(always)]
642    pub fn pep_2(&mut self) -> PEP_2_W {
643        PEP_2_W { w: self }
644    }
645    #[doc = "Bit 15 - Endpoint 3 Interrupt Disable"]
646    #[inline(always)]
647    pub fn pep_3(&mut self) -> PEP_3_W {
648        PEP_3_W { w: self }
649    }
650    #[doc = "Bit 16 - Endpoint 4 Interrupt Disable"]
651    #[inline(always)]
652    pub fn pep_4(&mut self) -> PEP_4_W {
653        PEP_4_W { w: self }
654    }
655    #[doc = "Bit 17 - Endpoint 5 Interrupt Disable"]
656    #[inline(always)]
657    pub fn pep_5(&mut self) -> PEP_5_W {
658        PEP_5_W { w: self }
659    }
660    #[doc = "Bit 18 - Endpoint 6 Interrupt Disable"]
661    #[inline(always)]
662    pub fn pep_6(&mut self) -> PEP_6_W {
663        PEP_6_W { w: self }
664    }
665    #[doc = "Bit 19 - Endpoint 7 Interrupt Disable"]
666    #[inline(always)]
667    pub fn pep_7(&mut self) -> PEP_7_W {
668        PEP_7_W { w: self }
669    }
670    #[doc = "Bit 20 - Endpoint 8 Interrupt Disable"]
671    #[inline(always)]
672    pub fn pep_8(&mut self) -> PEP_8_W {
673        PEP_8_W { w: self }
674    }
675    #[doc = "Bit 21 - Endpoint 9 Interrupt Disable"]
676    #[inline(always)]
677    pub fn pep_9(&mut self) -> PEP_9_W {
678        PEP_9_W { w: self }
679    }
680    #[doc = "Bit 22 - Endpoint 10 Interrupt Disable"]
681    #[inline(always)]
682    pub fn pep_10(&mut self) -> PEP_10_W {
683        PEP_10_W { w: self }
684    }
685    #[doc = "Bit 23 - Endpoint 11 Interrupt Disable"]
686    #[inline(always)]
687    pub fn pep_11(&mut self) -> PEP_11_W {
688        PEP_11_W { w: self }
689    }
690    #[doc = "Bit 25 - DMA Channel 1 Interrupt Disable"]
691    #[inline(always)]
692    pub fn dma_1(&mut self) -> DMA_1_W {
693        DMA_1_W { w: self }
694    }
695    #[doc = "Bit 26 - DMA Channel 2 Interrupt Disable"]
696    #[inline(always)]
697    pub fn dma_2(&mut self) -> DMA_2_W {
698        DMA_2_W { w: self }
699    }
700    #[doc = "Bit 27 - DMA Channel 3 Interrupt Disable"]
701    #[inline(always)]
702    pub fn dma_3(&mut self) -> DMA_3_W {
703        DMA_3_W { w: self }
704    }
705    #[doc = "Bit 28 - DMA Channel 4 Interrupt Disable"]
706    #[inline(always)]
707    pub fn dma_4(&mut self) -> DMA_4_W {
708        DMA_4_W { w: self }
709    }
710    #[doc = "Bit 29 - DMA Channel 5 Interrupt Disable"]
711    #[inline(always)]
712    pub fn dma_5(&mut self) -> DMA_5_W {
713        DMA_5_W { w: self }
714    }
715    #[doc = "Bit 30 - DMA Channel 6 Interrupt Disable"]
716    #[inline(always)]
717    pub fn dma_6(&mut self) -> DMA_6_W {
718        DMA_6_W { w: self }
719    }
720    #[doc = "Bit 31 - DMA Channel 7 Interrupt Disable"]
721    #[inline(always)]
722    pub fn dma_7(&mut self) -> DMA_7_W {
723        DMA_7_W { w: self }
724    }
725    #[doc = "Writes raw bits to the register."]
726    #[inline(always)]
727    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
728        self.0.bits(bits);
729        self
730    }
731}
732#[doc = "Device Global Interrupt Disable Register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [usbhs_devidr](index.html) module"]
733pub struct USBHS_DEVIDR_SPEC;
734impl crate::RegisterSpec for USBHS_DEVIDR_SPEC {
735    type Ux = u32;
736}
737#[doc = "`write(|w| ..)` method takes [usbhs_devidr::W](W) writer structure"]
738impl crate::Writable for USBHS_DEVIDR_SPEC {
739    type Writer = W;
740}
741#[doc = "`reset()` method sets USBHS_DEVIDR to value 0"]
742impl crate::Resettable for USBHS_DEVIDR_SPEC {
743    #[inline(always)]
744    fn reset_value() -> Self::Ux {
745        0
746    }
747}
atsams70q21/usbhs/usbhs_devidr.rs

atsams70q21/usbhs/
usbhs_devidr.rs
