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#[doc = r"Value read from the register"] pub struct R { bits: u32, } #[doc = r"Value to write to the register"] pub struct W { bits: u32, } impl super::USBHS_DEVCTRL { #[doc = r"Modifies the contents of the register"] #[inline(always)] pub fn modify<F>(&self, f: F) where for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, { let bits = self.register.get(); self.register.set(f(&R { bits }, &mut W { bits }).bits); } #[doc = r"Reads the contents of the register"] #[inline(always)] pub fn read(&self) -> R { R { bits: self.register.get(), } } #[doc = r"Writes to the register"] #[inline(always)] pub fn write<F>(&self, f: F) where F: FnOnce(&mut W) -> &mut W, { self.register.set( f(&mut W { bits: Self::reset_value(), }) .bits, ); } #[doc = r"Reset value of the register"] #[inline(always)] pub const fn reset_value() -> u32 { 0 } #[doc = r"Writes the reset value to the register"] #[inline(always)] pub fn reset(&self) { self.register.set(Self::reset_value()) } } #[doc = r"Reader of the field"] pub type UADD_R = crate::FR<u8, u8>; #[doc = r"Proxy"] pub struct _UADDW<'a> { w: &'a mut W, } impl<'a> _UADDW<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0x7f) | ((value as u32) & 0x7f); self.w } } #[doc = r"Reader of the field"] pub type ADDEN_R = crate::FR<bool, bool>; #[doc = r"Proxy"] pub struct _ADDENW<'a> { w: &'a mut W, } impl<'a> _ADDENW<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | (((value as u32) & 0x01) << 7); self.w } } #[doc = r"Reader of the field"] pub type DETACH_R = crate::FR<bool, bool>; #[doc = r"Proxy"] pub struct _DETACHW<'a> { w: &'a mut W, } impl<'a> _DETACHW<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | (((value as u32) & 0x01) << 8); self.w } } #[doc = r"Reader of the field"] pub type RMWKUP_R = crate::FR<bool, bool>; #[doc = r"Proxy"] pub struct _RMWKUPW<'a> { w: &'a mut W, } impl<'a> _RMWKUPW<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | (((value as u32) & 0x01) << 9); self.w } } #[doc = "Possible values of the field `SPDCONF`"] #[derive(Clone, Copy, Debug, PartialEq)] pub enum SPDCONFR { #[doc = "The peripheral starts in Full-speed mode and performs a high-speed reset to switch to High-speed mode if the host is high-speed-capable."] NORMAL, #[doc = "For a better consumption, if high speed is not needed."] LOW_POWER, } impl crate::ToBits<u8> for SPDCONFR { #[inline(always)] fn _bits(&self) -> u8 { match *self { SPDCONFR::NORMAL => 0, SPDCONFR::LOW_POWER => 1, } } } #[doc = r"Reader of the field"] pub type SPDCONF_R = crate::FR<u8, SPDCONFR>; impl SPDCONF_R { #[doc = "Checks if the value of the field is `NORMAL`"] #[inline(always)] pub fn is_normal(&self) -> bool { *self == SPDCONFR::NORMAL } #[doc = "Checks if the value of the field is `LOW_POWER`"] #[inline(always)] pub fn is_low_power(&self) -> bool { *self == SPDCONFR::LOW_POWER } } #[doc = "Values that can be written to the field `SPDCONF`"] #[derive(Clone, Copy, Debug, PartialEq)] pub enum SPDCONFW { #[doc = "The peripheral starts in Full-speed mode and performs a high-speed reset to switch to High-speed mode if the host is high-speed-capable."] NORMAL, #[doc = "For a better consumption, if high speed is not needed."] LOW_POWER, } impl SPDCONFW { #[allow(missing_docs)] #[doc(hidden)] #[inline(always)] pub fn _bits(&self) -> u8 { match *self { SPDCONFW::NORMAL => 0, SPDCONFW::LOW_POWER => 1, } } } #[doc = r"Proxy"] pub struct _SPDCONFW<'a> { w: &'a mut W, } impl<'a> _SPDCONFW<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: SPDCONFW) -> &'a mut W { unsafe { self.bits(variant._bits()) } } #[doc = "The peripheral starts in Full-speed mode and performs a high-speed reset to switch to High-speed mode if the host is high-speed-capable."] #[inline(always)] pub fn normal(self) -> &'a mut W { self.variant(SPDCONFW::NORMAL) } #[doc = "For a better consumption, if high speed is not needed."] #[inline(always)] pub fn low_power(self) -> &'a mut W { self.variant(SPDCONFW::LOW_POWER) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 10)) | (((value as u32) & 0x03) << 10); self.w } } #[doc = r"Reader of the field"] pub type LS_R = crate::FR<bool, bool>; #[doc = r"Proxy"] pub struct _LSW<'a> { w: &'a mut W, } impl<'a> _LSW<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 12)) | (((value as u32) & 0x01) << 12); self.w } } #[doc = r"Reader of the field"] pub type TSTJ_R = crate::FR<bool, bool>; #[doc = r"Proxy"] pub struct _TSTJW<'a> { w: &'a mut W, } impl<'a> _TSTJW<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 13)) | (((value as u32) & 0x01) << 13); self.w } } #[doc = r"Reader of the field"] pub type TSTK_R = crate::FR<bool, bool>; #[doc = r"Proxy"] pub struct _TSTKW<'a> { w: &'a mut W, } impl<'a> _TSTKW<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 14)) | (((value as u32) & 0x01) << 14); self.w } } #[doc = r"Reader of the field"] pub type TSTPCKT_R = crate::FR<bool, bool>; #[doc = r"Proxy"] pub struct _TSTPCKTW<'a> { w: &'a mut W, } impl<'a> _TSTPCKTW<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | (((value as u32) & 0x01) << 15); self.w } } #[doc = r"Reader of the field"] pub type OPMODE2_R = crate::FR<bool, bool>; #[doc = r"Proxy"] pub struct _OPMODE2W<'a> { w: &'a mut W, } impl<'a> _OPMODE2W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 16)) | (((value as u32) & 0x01) << 16); self.w } } impl R { #[doc = r"Value of the register as raw bits"] #[inline(always)] pub fn bits(&self) -> u32 { self.bits } #[doc = "Bits 0:6 - USB Address"] #[inline(always)] pub fn uadd(&self) -> UADD_R { UADD_R::new((self.bits() & 0x7f) as u8) } #[doc = "Bit 7 - Address Enable"] #[inline(always)] pub fn adden(&self) -> ADDEN_R { ADDEN_R::new(((self.bits() >> 7) & 0x01) != 0) } #[doc = "Bit 8 - Detach"] #[inline(always)] pub fn detach(&self) -> DETACH_R { DETACH_R::new(((self.bits() >> 8) & 0x01) != 0) } #[doc = "Bit 9 - Remote Wake-Up"] #[inline(always)] pub fn rmwkup(&self) -> RMWKUP_R { RMWKUP_R::new(((self.bits() >> 9) & 0x01) != 0) } #[doc = "Bits 10:11 - Mode Configuration"] #[inline(always)] pub fn spdconf(&self) -> SPDCONF_R { SPDCONF_R::new(((self.bits() >> 10) & 0x03) as u8) } #[doc = "Bit 12 - Low-Speed Mode Force"] #[inline(always)] pub fn ls(&self) -> LS_R { LS_R::new(((self.bits() >> 12) & 0x01) != 0) } #[doc = "Bit 13 - Test mode J"] #[inline(always)] pub fn tstj(&self) -> TSTJ_R { TSTJ_R::new(((self.bits() >> 13) & 0x01) != 0) } #[doc = "Bit 14 - Test mode K"] #[inline(always)] pub fn tstk(&self) -> TSTK_R { TSTK_R::new(((self.bits() >> 14) & 0x01) != 0) } #[doc = "Bit 15 - Test packet mode"] #[inline(always)] pub fn tstpckt(&self) -> TSTPCKT_R { TSTPCKT_R::new(((self.bits() >> 15) & 0x01) != 0) } #[doc = "Bit 16 - Specific Operational mode"] #[inline(always)] pub fn opmode2(&self) -> OPMODE2_R { OPMODE2_R::new(((self.bits() >> 16) & 0x01) != 0) } } impl W { #[doc = r"Writes raw bits to the register"] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.bits = bits; self } #[doc = "Bits 0:6 - USB Address"] #[inline(always)] pub fn uadd(&mut self) -> _UADDW { _UADDW { w: self } } #[doc = "Bit 7 - Address Enable"] #[inline(always)] pub fn adden(&mut self) -> _ADDENW { _ADDENW { w: self } } #[doc = "Bit 8 - Detach"] #[inline(always)] pub fn detach(&mut self) -> _DETACHW { _DETACHW { w: self } } #[doc = "Bit 9 - Remote Wake-Up"] #[inline(always)] pub fn rmwkup(&mut self) -> _RMWKUPW { _RMWKUPW { w: self } } #[doc = "Bits 10:11 - Mode Configuration"] #[inline(always)] pub fn spdconf(&mut self) -> _SPDCONFW { _SPDCONFW { w: self } } #[doc = "Bit 12 - Low-Speed Mode Force"] #[inline(always)] pub fn ls(&mut self) -> _LSW { _LSW { w: self } } #[doc = "Bit 13 - Test mode J"] #[inline(always)] pub fn tstj(&mut self) -> _TSTJW { _TSTJW { w: self } } #[doc = "Bit 14 - Test mode K"] #[inline(always)] pub fn tstk(&mut self) -> _TSTKW { _TSTKW { w: self } } #[doc = "Bit 15 - Test packet mode"] #[inline(always)] pub fn tstpckt(&mut self) -> _TSTPCKTW { _TSTPCKTW { w: self } } #[doc = "Bit 16 - Specific Operational mode"] #[inline(always)] pub fn opmode2(&mut self) -> _OPMODE2W { _OPMODE2W { w: self } } }