#[doc = r"Value read from the register"]
pub struct R {
bits: u32,
}
#[doc = r"Value to write to the register"]
pub struct W {
bits: u32,
}
impl super::US_MR {
#[doc = r"Modifies the contents of the register"]
#[inline(always)]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
self.register.set(f(&R { bits }, &mut W { bits }).bits);
}
#[doc = r"Reads the contents of the register"]
#[inline(always)]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
#[doc = r"Writes to the register"]
#[inline(always)]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
self.register.set(
f(&mut W {
bits: Self::reset_value(),
})
.bits,
);
}
#[doc = r"Reset value of the register"]
#[inline(always)]
pub const fn reset_value() -> u32 {
0
}
#[doc = r"Writes the reset value to the register"]
#[inline(always)]
pub fn reset(&self) {
self.register.set(Self::reset_value())
}
}
#[doc = "Possible values of the field `USART_MODE`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum USART_MODER {
#[doc = "Normal mode"]
NORMAL,
#[doc = "RS485"]
RS485,
#[doc = "Hardware Handshaking"]
HW_HANDSHAKING,
#[doc = "Modem"]
MODEM,
#[doc = "IS07816 Protocol: T = 0"]
IS07816_T_0,
#[doc = "IS07816 Protocol: T = 1"]
IS07816_T_1,
#[doc = "IrDA"]
IRDA,
#[doc = "LON"]
LON,
#[doc = "SPI master"]
SPI_MASTER,
#[doc = "SPI Slave"]
SPI_SLAVE,
}
impl crate::ToBits<u8> for USART_MODER {
#[inline(always)]
fn _bits(&self) -> u8 {
match *self {
USART_MODER::NORMAL => 0,
USART_MODER::RS485 => 1,
USART_MODER::HW_HANDSHAKING => 2,
USART_MODER::MODEM => 3,
USART_MODER::IS07816_T_0 => 4,
USART_MODER::IS07816_T_1 => 6,
USART_MODER::IRDA => 8,
USART_MODER::LON => 9,
USART_MODER::SPI_MASTER => 14,
USART_MODER::SPI_SLAVE => 15,
}
}
}
#[doc = r"Reader of the field"]
pub type USART_MODE_R = crate::FR<u8, USART_MODER>;
impl USART_MODE_R {
#[doc = "Checks if the value of the field is `NORMAL`"]
#[inline(always)]
pub fn is_normal(&self) -> bool {
*self == USART_MODER::NORMAL
}
#[doc = "Checks if the value of the field is `RS485`"]
#[inline(always)]
pub fn is_rs485(&self) -> bool {
*self == USART_MODER::RS485
}
#[doc = "Checks if the value of the field is `HW_HANDSHAKING`"]
#[inline(always)]
pub fn is_hw_handshaking(&self) -> bool {
*self == USART_MODER::HW_HANDSHAKING
}
#[doc = "Checks if the value of the field is `MODEM`"]
#[inline(always)]
pub fn is_modem(&self) -> bool {
*self == USART_MODER::MODEM
}
#[doc = "Checks if the value of the field is `IS07816_T_0`"]
#[inline(always)]
pub fn is_is07816_t_0(&self) -> bool {
*self == USART_MODER::IS07816_T_0
}
#[doc = "Checks if the value of the field is `IS07816_T_1`"]
#[inline(always)]
pub fn is_is07816_t_1(&self) -> bool {
*self == USART_MODER::IS07816_T_1
}
#[doc = "Checks if the value of the field is `IRDA`"]
#[inline(always)]
pub fn is_irda(&self) -> bool {
*self == USART_MODER::IRDA
}
#[doc = "Checks if the value of the field is `LON`"]
#[inline(always)]
pub fn is_lon(&self) -> bool {
*self == USART_MODER::LON
}
#[doc = "Checks if the value of the field is `SPI_MASTER`"]
#[inline(always)]
pub fn is_spi_master(&self) -> bool {
*self == USART_MODER::SPI_MASTER
}
#[doc = "Checks if the value of the field is `SPI_SLAVE`"]
#[inline(always)]
pub fn is_spi_slave(&self) -> bool {
*self == USART_MODER::SPI_SLAVE
}
}
#[doc = "Values that can be written to the field `USART_MODE`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum USART_MODEW {
#[doc = "Normal mode"]
NORMAL,
#[doc = "RS485"]
RS485,
#[doc = "Hardware Handshaking"]
HW_HANDSHAKING,
#[doc = "Modem"]
MODEM,
#[doc = "IS07816 Protocol: T = 0"]
IS07816_T_0,
#[doc = "IS07816 Protocol: T = 1"]
IS07816_T_1,
#[doc = "IrDA"]
IRDA,
#[doc = "LON"]
LON,
#[doc = "SPI master"]
SPI_MASTER,
#[doc = "SPI Slave"]
SPI_SLAVE,
}
impl USART_MODEW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline(always)]
pub fn _bits(&self) -> u8 {
match *self {
USART_MODEW::NORMAL => 0,
USART_MODEW::RS485 => 1,
USART_MODEW::HW_HANDSHAKING => 2,
USART_MODEW::MODEM => 3,
USART_MODEW::IS07816_T_0 => 4,
USART_MODEW::IS07816_T_1 => 6,
USART_MODEW::IRDA => 8,
USART_MODEW::LON => 9,
USART_MODEW::SPI_MASTER => 14,
USART_MODEW::SPI_SLAVE => 15,
}
}
}
#[doc = r"Proxy"]
pub struct _USART_MODEW<'a> {
w: &'a mut W,
}
impl<'a> _USART_MODEW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: USART_MODEW) -> &'a mut W {
unsafe { self.bits(variant._bits()) }
}
#[doc = "Normal mode"]
#[inline(always)]
pub fn normal(self) -> &'a mut W {
self.variant(USART_MODEW::NORMAL)
}
#[doc = "RS485"]
#[inline(always)]
pub fn rs485(self) -> &'a mut W {
self.variant(USART_MODEW::RS485)
}
#[doc = "Hardware Handshaking"]
#[inline(always)]
pub fn hw_handshaking(self) -> &'a mut W {
self.variant(USART_MODEW::HW_HANDSHAKING)
}
#[doc = "Modem"]
#[inline(always)]
pub fn modem(self) -> &'a mut W {
self.variant(USART_MODEW::MODEM)
}
#[doc = "IS07816 Protocol: T = 0"]
#[inline(always)]
pub fn is07816_t_0(self) -> &'a mut W {
self.variant(USART_MODEW::IS07816_T_0)
}
#[doc = "IS07816 Protocol: T = 1"]
#[inline(always)]
pub fn is07816_t_1(self) -> &'a mut W {
self.variant(USART_MODEW::IS07816_T_1)
}
#[doc = "IrDA"]
#[inline(always)]
pub fn irda(self) -> &'a mut W {
self.variant(USART_MODEW::IRDA)
}
#[doc = "LON"]
#[inline(always)]
pub fn lon(self) -> &'a mut W {
self.variant(USART_MODEW::LON)
}
#[doc = "SPI master"]
#[inline(always)]
pub fn spi_master(self) -> &'a mut W {
self.variant(USART_MODEW::SPI_MASTER)
}
#[doc = "SPI Slave"]
#[inline(always)]
pub fn spi_slave(self) -> &'a mut W {
self.variant(USART_MODEW::SPI_SLAVE)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
self.w.bits = (self.w.bits & !0x0f) | ((value as u32) & 0x0f);
self.w
}
}
#[doc = "Possible values of the field `USCLKS`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum USCLKSR {
#[doc = "Peripheral clock is selected"]
MCK,
#[doc = "Peripheral clock divided (DIV=DIV=8) is selected"]
DIV,
#[doc = "PMC programmable clock (PCK) is selected. If the SCK pin is driven (CLKO = 1), the CD field must be greater than 1."]
PCK,
#[doc = "Serial clock (SCK) is selected"]
SCK,
}
impl crate::ToBits<u8> for USCLKSR {
#[inline(always)]
fn _bits(&self) -> u8 {
match *self {
USCLKSR::MCK => 0,
USCLKSR::DIV => 1,
USCLKSR::PCK => 2,
USCLKSR::SCK => 3,
}
}
}
#[doc = r"Reader of the field"]
pub type USCLKS_R = crate::FR<u8, USCLKSR>;
impl USCLKS_R {
#[doc = "Checks if the value of the field is `MCK`"]
#[inline(always)]
pub fn is_mck(&self) -> bool {
*self == USCLKSR::MCK
}
#[doc = "Checks if the value of the field is `DIV`"]
#[inline(always)]
pub fn is_div(&self) -> bool {
*self == USCLKSR::DIV
}
#[doc = "Checks if the value of the field is `PCK`"]
#[inline(always)]
pub fn is_pck(&self) -> bool {
*self == USCLKSR::PCK
}
#[doc = "Checks if the value of the field is `SCK`"]
#[inline(always)]
pub fn is_sck(&self) -> bool {
*self == USCLKSR::SCK
}
}
#[doc = "Values that can be written to the field `USCLKS`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum USCLKSW {
#[doc = "Peripheral clock is selected"]
MCK,
#[doc = "Peripheral clock divided (DIV=DIV=8) is selected"]
DIV,
#[doc = "PMC programmable clock (PCK) is selected. If the SCK pin is driven (CLKO = 1), the CD field must be greater than 1."]
PCK,
#[doc = "Serial clock (SCK) is selected"]
SCK,
}
impl USCLKSW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline(always)]
pub fn _bits(&self) -> u8 {
match *self {
USCLKSW::MCK => 0,
USCLKSW::DIV => 1,
USCLKSW::PCK => 2,
USCLKSW::SCK => 3,
}
}
}
#[doc = r"Proxy"]
pub struct _USCLKSW<'a> {
w: &'a mut W,
}
impl<'a> _USCLKSW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: USCLKSW) -> &'a mut W {
{
self.bits(variant._bits())
}
}
#[doc = "Peripheral clock is selected"]
#[inline(always)]
pub fn mck(self) -> &'a mut W {
self.variant(USCLKSW::MCK)
}
#[doc = "Peripheral clock divided (DIV=DIV=8) is selected"]
#[inline(always)]
pub fn div(self) -> &'a mut W {
self.variant(USCLKSW::DIV)
}
#[doc = "PMC programmable clock (PCK) is selected. If the SCK pin is driven (CLKO = 1), the CD field must be greater than 1."]
#[inline(always)]
pub fn pck(self) -> &'a mut W {
self.variant(USCLKSW::PCK)
}
#[doc = "Serial clock (SCK) is selected"]
#[inline(always)]
pub fn sck(self) -> &'a mut W {
self.variant(USCLKSW::SCK)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bits(self, value: u8) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x03 << 4)) | (((value as u32) & 0x03) << 4);
self.w
}
}
#[doc = "Possible values of the field `CHRL`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum CHRLR {
#[doc = "Character length is 5 bits"]
_5_BIT,
#[doc = "Character length is 6 bits"]
_6_BIT,
#[doc = "Character length is 7 bits"]
_7_BIT,
#[doc = "Character length is 8 bits"]
_8_BIT,
}
impl crate::ToBits<u8> for CHRLR {
#[inline(always)]
fn _bits(&self) -> u8 {
match *self {
CHRLR::_5_BIT => 0,
CHRLR::_6_BIT => 1,
CHRLR::_7_BIT => 2,
CHRLR::_8_BIT => 3,
}
}
}
#[doc = r"Reader of the field"]
pub type CHRL_R = crate::FR<u8, CHRLR>;
impl CHRL_R {
#[doc = "Checks if the value of the field is `_5_BIT`"]
#[inline(always)]
pub fn is_5_bit(&self) -> bool {
*self == CHRLR::_5_BIT
}
#[doc = "Checks if the value of the field is `_6_BIT`"]
#[inline(always)]
pub fn is_6_bit(&self) -> bool {
*self == CHRLR::_6_BIT
}
#[doc = "Checks if the value of the field is `_7_BIT`"]
#[inline(always)]
pub fn is_7_bit(&self) -> bool {
*self == CHRLR::_7_BIT
}
#[doc = "Checks if the value of the field is `_8_BIT`"]
#[inline(always)]
pub fn is_8_bit(&self) -> bool {
*self == CHRLR::_8_BIT
}
}
#[doc = "Values that can be written to the field `CHRL`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum CHRLW {
#[doc = "Character length is 5 bits"]
_5_BIT,
#[doc = "Character length is 6 bits"]
_6_BIT,
#[doc = "Character length is 7 bits"]
_7_BIT,
#[doc = "Character length is 8 bits"]
_8_BIT,
}
impl CHRLW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline(always)]
pub fn _bits(&self) -> u8 {
match *self {
CHRLW::_5_BIT => 0,
CHRLW::_6_BIT => 1,
CHRLW::_7_BIT => 2,
CHRLW::_8_BIT => 3,
}
}
}
#[doc = r"Proxy"]
pub struct _CHRLW<'a> {
w: &'a mut W,
}
impl<'a> _CHRLW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: CHRLW) -> &'a mut W {
{
self.bits(variant._bits())
}
}
#[doc = "Character length is 5 bits"]
#[inline(always)]
pub fn _5_bit(self) -> &'a mut W {
self.variant(CHRLW::_5_BIT)
}
#[doc = "Character length is 6 bits"]
#[inline(always)]
pub fn _6_bit(self) -> &'a mut W {
self.variant(CHRLW::_6_BIT)
}
#[doc = "Character length is 7 bits"]
#[inline(always)]
pub fn _7_bit(self) -> &'a mut W {
self.variant(CHRLW::_7_BIT)
}
#[doc = "Character length is 8 bits"]
#[inline(always)]
pub fn _8_bit(self) -> &'a mut W {
self.variant(CHRLW::_8_BIT)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bits(self, value: u8) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x03 << 6)) | (((value as u32) & 0x03) << 6);
self.w
}
}
#[doc = r"Reader of the field"]
pub type SYNC_R = crate::FR<bool, bool>;
#[doc = r"Proxy"]
pub struct _SYNCW<'a> {
w: &'a mut W,
}
impl<'a> _SYNCW<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 8)) | (((value as u32) & 0x01) << 8);
self.w
}
}
#[doc = "Possible values of the field `PAR`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum PARR {
#[doc = "Even parity"]
EVEN,
#[doc = "Odd parity"]
ODD,
#[doc = "Parity forced to 0 (Space)"]
SPACE,
#[doc = "Parity forced to 1 (Mark)"]
MARK,
#[doc = "No parity"]
NO,
#[doc = "Multidrop mode"]
MULTIDROP,
}
impl crate::ToBits<u8> for PARR {
#[inline(always)]
fn _bits(&self) -> u8 {
match *self {
PARR::EVEN => 0,
PARR::ODD => 1,
PARR::SPACE => 2,
PARR::MARK => 3,
PARR::NO => 4,
PARR::MULTIDROP => 6,
}
}
}
#[doc = r"Reader of the field"]
pub type PAR_R = crate::FR<u8, PARR>;
impl PAR_R {
#[doc = "Checks if the value of the field is `EVEN`"]
#[inline(always)]
pub fn is_even(&self) -> bool {
*self == PARR::EVEN
}
#[doc = "Checks if the value of the field is `ODD`"]
#[inline(always)]
pub fn is_odd(&self) -> bool {
*self == PARR::ODD
}
#[doc = "Checks if the value of the field is `SPACE`"]
#[inline(always)]
pub fn is_space(&self) -> bool {
*self == PARR::SPACE
}
#[doc = "Checks if the value of the field is `MARK`"]
#[inline(always)]
pub fn is_mark(&self) -> bool {
*self == PARR::MARK
}
#[doc = "Checks if the value of the field is `NO`"]
#[inline(always)]
pub fn is_no(&self) -> bool {
*self == PARR::NO
}
#[doc = "Checks if the value of the field is `MULTIDROP`"]
#[inline(always)]
pub fn is_multidrop(&self) -> bool {
*self == PARR::MULTIDROP
}
}
#[doc = "Values that can be written to the field `PAR`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum PARW {
#[doc = "Even parity"]
EVEN,
#[doc = "Odd parity"]
ODD,
#[doc = "Parity forced to 0 (Space)"]
SPACE,
#[doc = "Parity forced to 1 (Mark)"]
MARK,
#[doc = "No parity"]
NO,
#[doc = "Multidrop mode"]
MULTIDROP,
}
impl PARW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline(always)]
pub fn _bits(&self) -> u8 {
match *self {
PARW::EVEN => 0,
PARW::ODD => 1,
PARW::SPACE => 2,
PARW::MARK => 3,
PARW::NO => 4,
PARW::MULTIDROP => 6,
}
}
}
#[doc = r"Proxy"]
pub struct _PARW<'a> {
w: &'a mut W,
}
impl<'a> _PARW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: PARW) -> &'a mut W {
unsafe { self.bits(variant._bits()) }
}
#[doc = "Even parity"]
#[inline(always)]
pub fn even(self) -> &'a mut W {
self.variant(PARW::EVEN)
}
#[doc = "Odd parity"]
#[inline(always)]
pub fn odd(self) -> &'a mut W {
self.variant(PARW::ODD)
}
#[doc = "Parity forced to 0 (Space)"]
#[inline(always)]
pub fn space(self) -> &'a mut W {
self.variant(PARW::SPACE)
}
#[doc = "Parity forced to 1 (Mark)"]
#[inline(always)]
pub fn mark(self) -> &'a mut W {
self.variant(PARW::MARK)
}
#[doc = "No parity"]
#[inline(always)]
pub fn no(self) -> &'a mut W {
self.variant(PARW::NO)
}
#[doc = "Multidrop mode"]
#[inline(always)]
pub fn multidrop(self) -> &'a mut W {
self.variant(PARW::MULTIDROP)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x07 << 9)) | (((value as u32) & 0x07) << 9);
self.w
}
}
#[doc = "Possible values of the field `NBSTOP`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum NBSTOPR {
#[doc = "1 stop bit"]
_1_BIT,
#[doc = "1.5 stop bit (SYNC = 0) or reserved (SYNC = 1)"]
_1_5_BIT,
#[doc = "2 stop bits"]
_2_BIT,
}
impl crate::ToBits<u8> for NBSTOPR {
#[inline(always)]
fn _bits(&self) -> u8 {
match *self {
NBSTOPR::_1_BIT => 0,
NBSTOPR::_1_5_BIT => 1,
NBSTOPR::_2_BIT => 2,
}
}
}
#[doc = r"Reader of the field"]
pub type NBSTOP_R = crate::FR<u8, NBSTOPR>;
impl NBSTOP_R {
#[doc = "Checks if the value of the field is `_1_BIT`"]
#[inline(always)]
pub fn is_1_bit(&self) -> bool {
*self == NBSTOPR::_1_BIT
}
#[doc = "Checks if the value of the field is `_1_5_BIT`"]
#[inline(always)]
pub fn is_1_5_bit(&self) -> bool {
*self == NBSTOPR::_1_5_BIT
}
#[doc = "Checks if the value of the field is `_2_BIT`"]
#[inline(always)]
pub fn is_2_bit(&self) -> bool {
*self == NBSTOPR::_2_BIT
}
}
#[doc = "Values that can be written to the field `NBSTOP`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum NBSTOPW {
#[doc = "1 stop bit"]
_1_BIT,
#[doc = "1.5 stop bit (SYNC = 0) or reserved (SYNC = 1)"]
_1_5_BIT,
#[doc = "2 stop bits"]
_2_BIT,
}
impl NBSTOPW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline(always)]
pub fn _bits(&self) -> u8 {
match *self {
NBSTOPW::_1_BIT => 0,
NBSTOPW::_1_5_BIT => 1,
NBSTOPW::_2_BIT => 2,
}
}
}
#[doc = r"Proxy"]
pub struct _NBSTOPW<'a> {
w: &'a mut W,
}
impl<'a> _NBSTOPW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: NBSTOPW) -> &'a mut W {
unsafe { self.bits(variant._bits()) }
}
#[doc = "1 stop bit"]
#[inline(always)]
pub fn _1_bit(self) -> &'a mut W {
self.variant(NBSTOPW::_1_BIT)
}
#[doc = "1.5 stop bit (SYNC = 0) or reserved (SYNC = 1)"]
#[inline(always)]
pub fn _1_5_bit(self) -> &'a mut W {
self.variant(NBSTOPW::_1_5_BIT)
}
#[doc = "2 stop bits"]
#[inline(always)]
pub fn _2_bit(self) -> &'a mut W {
self.variant(NBSTOPW::_2_BIT)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x03 << 12)) | (((value as u32) & 0x03) << 12);
self.w
}
}
#[doc = "Possible values of the field `CHMODE`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum CHMODER {
#[doc = "Normal mode"]
NORMAL,
#[doc = "Automatic Echo. Receiver input is connected to the TXD pin."]
AUTOMATIC,
#[doc = "Local Loopback. Transmitter output is connected to the Receiver Input."]
LOCAL_LOOPBACK,
#[doc = "Remote Loopback. RXD pin is internally connected to the TXD pin."]
REMOTE_LOOPBACK,
}
impl crate::ToBits<u8> for CHMODER {
#[inline(always)]
fn _bits(&self) -> u8 {
match *self {
CHMODER::NORMAL => 0,
CHMODER::AUTOMATIC => 1,
CHMODER::LOCAL_LOOPBACK => 2,
CHMODER::REMOTE_LOOPBACK => 3,
}
}
}
#[doc = r"Reader of the field"]
pub type CHMODE_R = crate::FR<u8, CHMODER>;
impl CHMODE_R {
#[doc = "Checks if the value of the field is `NORMAL`"]
#[inline(always)]
pub fn is_normal(&self) -> bool {
*self == CHMODER::NORMAL
}
#[doc = "Checks if the value of the field is `AUTOMATIC`"]
#[inline(always)]
pub fn is_automatic(&self) -> bool {
*self == CHMODER::AUTOMATIC
}
#[doc = "Checks if the value of the field is `LOCAL_LOOPBACK`"]
#[inline(always)]
pub fn is_local_loopback(&self) -> bool {
*self == CHMODER::LOCAL_LOOPBACK
}
#[doc = "Checks if the value of the field is `REMOTE_LOOPBACK`"]
#[inline(always)]
pub fn is_remote_loopback(&self) -> bool {
*self == CHMODER::REMOTE_LOOPBACK
}
}
#[doc = "Values that can be written to the field `CHMODE`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum CHMODEW {
#[doc = "Normal mode"]
NORMAL,
#[doc = "Automatic Echo. Receiver input is connected to the TXD pin."]
AUTOMATIC,
#[doc = "Local Loopback. Transmitter output is connected to the Receiver Input."]
LOCAL_LOOPBACK,
#[doc = "Remote Loopback. RXD pin is internally connected to the TXD pin."]
REMOTE_LOOPBACK,
}
impl CHMODEW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline(always)]
pub fn _bits(&self) -> u8 {
match *self {
CHMODEW::NORMAL => 0,
CHMODEW::AUTOMATIC => 1,
CHMODEW::LOCAL_LOOPBACK => 2,
CHMODEW::REMOTE_LOOPBACK => 3,
}
}
}
#[doc = r"Proxy"]
pub struct _CHMODEW<'a> {
w: &'a mut W,
}
impl<'a> _CHMODEW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: CHMODEW) -> &'a mut W {
{
self.bits(variant._bits())
}
}
#[doc = "Normal mode"]
#[inline(always)]
pub fn normal(self) -> &'a mut W {
self.variant(CHMODEW::NORMAL)
}
#[doc = "Automatic Echo. Receiver input is connected to the TXD pin."]
#[inline(always)]
pub fn automatic(self) -> &'a mut W {
self.variant(CHMODEW::AUTOMATIC)
}
#[doc = "Local Loopback. Transmitter output is connected to the Receiver Input."]
#[inline(always)]
pub fn local_loopback(self) -> &'a mut W {
self.variant(CHMODEW::LOCAL_LOOPBACK)
}
#[doc = "Remote Loopback. RXD pin is internally connected to the TXD pin."]
#[inline(always)]
pub fn remote_loopback(self) -> &'a mut W {
self.variant(CHMODEW::REMOTE_LOOPBACK)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bits(self, value: u8) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x03 << 14)) | (((value as u32) & 0x03) << 14);
self.w
}
}
#[doc = r"Reader of the field"]
pub type MSBF_R = crate::FR<bool, bool>;
#[doc = r"Proxy"]
pub struct _MSBFW<'a> {
w: &'a mut W,
}
impl<'a> _MSBFW<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 16)) | (((value as u32) & 0x01) << 16);
self.w
}
}
#[doc = r"Reader of the field"]
pub type MODE9_R = crate::FR<bool, bool>;
#[doc = r"Proxy"]
pub struct _MODE9W<'a> {
w: &'a mut W,
}
impl<'a> _MODE9W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 17)) | (((value as u32) & 0x01) << 17);
self.w
}
}
#[doc = r"Reader of the field"]
pub type CLKO_R = crate::FR<bool, bool>;
#[doc = r"Proxy"]
pub struct _CLKOW<'a> {
w: &'a mut W,
}
impl<'a> _CLKOW<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 18)) | (((value as u32) & 0x01) << 18);
self.w
}
}
#[doc = r"Reader of the field"]
pub type OVER_R = crate::FR<bool, bool>;
#[doc = r"Proxy"]
pub struct _OVERW<'a> {
w: &'a mut W,
}
impl<'a> _OVERW<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 19)) | (((value as u32) & 0x01) << 19);
self.w
}
}
#[doc = r"Reader of the field"]
pub type INACK_R = crate::FR<bool, bool>;
#[doc = r"Proxy"]
pub struct _INACKW<'a> {
w: &'a mut W,
}
impl<'a> _INACKW<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 20)) | (((value as u32) & 0x01) << 20);
self.w
}
}
#[doc = r"Reader of the field"]
pub type DSNACK_R = crate::FR<bool, bool>;
#[doc = r"Proxy"]
pub struct _DSNACKW<'a> {
w: &'a mut W,
}
impl<'a> _DSNACKW<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 21)) | (((value as u32) & 0x01) << 21);
self.w
}
}
#[doc = r"Reader of the field"]
pub type VAR_SYNC_R = crate::FR<bool, bool>;
#[doc = r"Proxy"]
pub struct _VAR_SYNCW<'a> {
w: &'a mut W,
}
impl<'a> _VAR_SYNCW<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 22)) | (((value as u32) & 0x01) << 22);
self.w
}
}
#[doc = r"Reader of the field"]
pub type INVDATA_R = crate::FR<bool, bool>;
#[doc = r"Proxy"]
pub struct _INVDATAW<'a> {
w: &'a mut W,
}
impl<'a> _INVDATAW<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 23)) | (((value as u32) & 0x01) << 23);
self.w
}
}
#[doc = r"Reader of the field"]
pub type MAX_ITERATION_R = crate::FR<u8, u8>;
#[doc = r"Proxy"]
pub struct _MAX_ITERATIONW<'a> {
w: &'a mut W,
}
impl<'a> _MAX_ITERATIONW<'a> {
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x07 << 24)) | (((value as u32) & 0x07) << 24);
self.w
}
}
#[doc = r"Reader of the field"]
pub type FILTER_R = crate::FR<bool, bool>;
#[doc = r"Proxy"]
pub struct _FILTERW<'a> {
w: &'a mut W,
}
impl<'a> _FILTERW<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 28)) | (((value as u32) & 0x01) << 28);
self.w
}
}
#[doc = r"Reader of the field"]
pub type MAN_R = crate::FR<bool, bool>;
#[doc = r"Proxy"]
pub struct _MANW<'a> {
w: &'a mut W,
}
impl<'a> _MANW<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 29)) | (((value as u32) & 0x01) << 29);
self.w
}
}
#[doc = r"Reader of the field"]
pub type MODSYNC_R = crate::FR<bool, bool>;
#[doc = r"Proxy"]
pub struct _MODSYNCW<'a> {
w: &'a mut W,
}
impl<'a> _MODSYNCW<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 30)) | (((value as u32) & 0x01) << 30);
self.w
}
}
#[doc = r"Reader of the field"]
pub type ONEBIT_R = crate::FR<bool, bool>;
#[doc = r"Proxy"]
pub struct _ONEBITW<'a> {
w: &'a mut W,
}
impl<'a> _ONEBITW<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 31)) | (((value as u32) & 0x01) << 31);
self.w
}
}
impl R {
#[doc = r"Value of the register as raw bits"]
#[inline(always)]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 0:3 - USART Mode of Operation"]
#[inline(always)]
pub fn usart_mode(&self) -> USART_MODE_R {
USART_MODE_R::new((self.bits() & 0x0f) as u8)
}
#[doc = "Bits 4:5 - Clock Selection"]
#[inline(always)]
pub fn usclks(&self) -> USCLKS_R {
USCLKS_R::new(((self.bits() >> 4) & 0x03) as u8)
}
#[doc = "Bits 6:7 - Character Length"]
#[inline(always)]
pub fn chrl(&self) -> CHRL_R {
CHRL_R::new(((self.bits() >> 6) & 0x03) as u8)
}
#[doc = "Bit 8 - Synchronous Mode Select"]
#[inline(always)]
pub fn sync(&self) -> SYNC_R {
SYNC_R::new(((self.bits() >> 8) & 0x01) != 0)
}
#[doc = "Bits 9:11 - Parity Type"]
#[inline(always)]
pub fn par(&self) -> PAR_R {
PAR_R::new(((self.bits() >> 9) & 0x07) as u8)
}
#[doc = "Bits 12:13 - Number of Stop Bits"]
#[inline(always)]
pub fn nbstop(&self) -> NBSTOP_R {
NBSTOP_R::new(((self.bits() >> 12) & 0x03) as u8)
}
#[doc = "Bits 14:15 - Channel Mode"]
#[inline(always)]
pub fn chmode(&self) -> CHMODE_R {
CHMODE_R::new(((self.bits() >> 14) & 0x03) as u8)
}
#[doc = "Bit 16 - Bit Order"]
#[inline(always)]
pub fn msbf(&self) -> MSBF_R {
MSBF_R::new(((self.bits() >> 16) & 0x01) != 0)
}
#[doc = "Bit 17 - 9-bit Character Length"]
#[inline(always)]
pub fn mode9(&self) -> MODE9_R {
MODE9_R::new(((self.bits() >> 17) & 0x01) != 0)
}
#[doc = "Bit 18 - Clock Output Select"]
#[inline(always)]
pub fn clko(&self) -> CLKO_R {
CLKO_R::new(((self.bits() >> 18) & 0x01) != 0)
}
#[doc = "Bit 19 - Oversampling Mode"]
#[inline(always)]
pub fn over(&self) -> OVER_R {
OVER_R::new(((self.bits() >> 19) & 0x01) != 0)
}
#[doc = "Bit 20 - Inhibit Non Acknowledge"]
#[inline(always)]
pub fn inack(&self) -> INACK_R {
INACK_R::new(((self.bits() >> 20) & 0x01) != 0)
}
#[doc = "Bit 21 - Disable Successive NACK"]
#[inline(always)]
pub fn dsnack(&self) -> DSNACK_R {
DSNACK_R::new(((self.bits() >> 21) & 0x01) != 0)
}
#[doc = "Bit 22 - Variable Synchronization of Command/Data Sync Start Frame Delimiter"]
#[inline(always)]
pub fn var_sync(&self) -> VAR_SYNC_R {
VAR_SYNC_R::new(((self.bits() >> 22) & 0x01) != 0)
}
#[doc = "Bit 23 - Inverted Data"]
#[inline(always)]
pub fn invdata(&self) -> INVDATA_R {
INVDATA_R::new(((self.bits() >> 23) & 0x01) != 0)
}
#[doc = "Bits 24:26 - Maximum Number of Automatic Iteration"]
#[inline(always)]
pub fn max_iteration(&self) -> MAX_ITERATION_R {
MAX_ITERATION_R::new(((self.bits() >> 24) & 0x07) as u8)
}
#[doc = "Bit 28 - Receive Line Filter"]
#[inline(always)]
pub fn filter(&self) -> FILTER_R {
FILTER_R::new(((self.bits() >> 28) & 0x01) != 0)
}
#[doc = "Bit 29 - Manchester Encoder/Decoder Enable"]
#[inline(always)]
pub fn man(&self) -> MAN_R {
MAN_R::new(((self.bits() >> 29) & 0x01) != 0)
}
#[doc = "Bit 30 - Manchester Synchronization Mode"]
#[inline(always)]
pub fn modsync(&self) -> MODSYNC_R {
MODSYNC_R::new(((self.bits() >> 30) & 0x01) != 0)
}
#[doc = "Bit 31 - Start Frame Delimiter Selector"]
#[inline(always)]
pub fn onebit(&self) -> ONEBIT_R {
ONEBIT_R::new(((self.bits() >> 31) & 0x01) != 0)
}
}
impl W {
#[doc = r"Writes raw bits to the register"]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bits 0:3 - USART Mode of Operation"]
#[inline(always)]
pub fn usart_mode(&mut self) -> _USART_MODEW {
_USART_MODEW { w: self }
}
#[doc = "Bits 4:5 - Clock Selection"]
#[inline(always)]
pub fn usclks(&mut self) -> _USCLKSW {
_USCLKSW { w: self }
}
#[doc = "Bits 6:7 - Character Length"]
#[inline(always)]
pub fn chrl(&mut self) -> _CHRLW {
_CHRLW { w: self }
}
#[doc = "Bit 8 - Synchronous Mode Select"]
#[inline(always)]
pub fn sync(&mut self) -> _SYNCW {
_SYNCW { w: self }
}
#[doc = "Bits 9:11 - Parity Type"]
#[inline(always)]
pub fn par(&mut self) -> _PARW {
_PARW { w: self }
}
#[doc = "Bits 12:13 - Number of Stop Bits"]
#[inline(always)]
pub fn nbstop(&mut self) -> _NBSTOPW {
_NBSTOPW { w: self }
}
#[doc = "Bits 14:15 - Channel Mode"]
#[inline(always)]
pub fn chmode(&mut self) -> _CHMODEW {
_CHMODEW { w: self }
}
#[doc = "Bit 16 - Bit Order"]
#[inline(always)]
pub fn msbf(&mut self) -> _MSBFW {
_MSBFW { w: self }
}
#[doc = "Bit 17 - 9-bit Character Length"]
#[inline(always)]
pub fn mode9(&mut self) -> _MODE9W {
_MODE9W { w: self }
}
#[doc = "Bit 18 - Clock Output Select"]
#[inline(always)]
pub fn clko(&mut self) -> _CLKOW {
_CLKOW { w: self }
}
#[doc = "Bit 19 - Oversampling Mode"]
#[inline(always)]
pub fn over(&mut self) -> _OVERW {
_OVERW { w: self }
}
#[doc = "Bit 20 - Inhibit Non Acknowledge"]
#[inline(always)]
pub fn inack(&mut self) -> _INACKW {
_INACKW { w: self }
}
#[doc = "Bit 21 - Disable Successive NACK"]
#[inline(always)]
pub fn dsnack(&mut self) -> _DSNACKW {
_DSNACKW { w: self }
}
#[doc = "Bit 22 - Variable Synchronization of Command/Data Sync Start Frame Delimiter"]
#[inline(always)]
pub fn var_sync(&mut self) -> _VAR_SYNCW {
_VAR_SYNCW { w: self }
}
#[doc = "Bit 23 - Inverted Data"]
#[inline(always)]
pub fn invdata(&mut self) -> _INVDATAW {
_INVDATAW { w: self }
}
#[doc = "Bits 24:26 - Maximum Number of Automatic Iteration"]
#[inline(always)]
pub fn max_iteration(&mut self) -> _MAX_ITERATIONW {
_MAX_ITERATIONW { w: self }
}
#[doc = "Bit 28 - Receive Line Filter"]
#[inline(always)]
pub fn filter(&mut self) -> _FILTERW {
_FILTERW { w: self }
}
#[doc = "Bit 29 - Manchester Encoder/Decoder Enable"]
#[inline(always)]
pub fn man(&mut self) -> _MANW {
_MANW { w: self }
}
#[doc = "Bit 30 - Manchester Synchronization Mode"]
#[inline(always)]
pub fn modsync(&mut self) -> _MODSYNCW {
_MODSYNCW { w: self }
}
#[doc = "Bit 31 - Start Frame Delimiter Selector"]
#[inline(always)]
pub fn onebit(&mut self) -> _ONEBITW {
_ONEBITW { w: self }
}
}