atsams70n21/usbhs/usbhs_hstdma/
usbhs_hstdmastatus.rs

1#[doc = "Register `USBHS_HSTDMASTATUS` reader"]
2pub struct R(crate::R<USBHS_HSTDMASTATUS_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<USBHS_HSTDMASTATUS_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<USBHS_HSTDMASTATUS_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<USBHS_HSTDMASTATUS_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `USBHS_HSTDMASTATUS` writer"]
17pub struct W(crate::W<USBHS_HSTDMASTATUS_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<USBHS_HSTDMASTATUS_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<USBHS_HSTDMASTATUS_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<USBHS_HSTDMASTATUS_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `CHANN_ENB` reader - Channel Enable Status"]
38pub struct CHANN_ENB_R(crate::FieldReader<bool, bool>);
39impl CHANN_ENB_R {
40    #[inline(always)]
41    pub(crate) fn new(bits: bool) -> Self {
42        CHANN_ENB_R(crate::FieldReader::new(bits))
43    }
44}
45impl core::ops::Deref for CHANN_ENB_R {
46    type Target = crate::FieldReader<bool, bool>;
47    #[inline(always)]
48    fn deref(&self) -> &Self::Target {
49        &self.0
50    }
51}
52#[doc = "Field `CHANN_ENB` writer - Channel Enable Status"]
53pub struct CHANN_ENB_W<'a> {
54    w: &'a mut W,
55}
56impl<'a> CHANN_ENB_W<'a> {
57    #[doc = r"Sets the field bit"]
58    #[inline(always)]
59    pub fn set_bit(self) -> &'a mut W {
60        self.bit(true)
61    }
62    #[doc = r"Clears the field bit"]
63    #[inline(always)]
64    pub fn clear_bit(self) -> &'a mut W {
65        self.bit(false)
66    }
67    #[doc = r"Writes raw bits to the field"]
68    #[inline(always)]
69    pub fn bit(self, value: bool) -> &'a mut W {
70        self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01);
71        self.w
72    }
73}
74#[doc = "Field `CHANN_ACT` reader - Channel Active Status"]
75pub struct CHANN_ACT_R(crate::FieldReader<bool, bool>);
76impl CHANN_ACT_R {
77    #[inline(always)]
78    pub(crate) fn new(bits: bool) -> Self {
79        CHANN_ACT_R(crate::FieldReader::new(bits))
80    }
81}
82impl core::ops::Deref for CHANN_ACT_R {
83    type Target = crate::FieldReader<bool, bool>;
84    #[inline(always)]
85    fn deref(&self) -> &Self::Target {
86        &self.0
87    }
88}
89#[doc = "Field `CHANN_ACT` writer - Channel Active Status"]
90pub struct CHANN_ACT_W<'a> {
91    w: &'a mut W,
92}
93impl<'a> CHANN_ACT_W<'a> {
94    #[doc = r"Sets the field bit"]
95    #[inline(always)]
96    pub fn set_bit(self) -> &'a mut W {
97        self.bit(true)
98    }
99    #[doc = r"Clears the field bit"]
100    #[inline(always)]
101    pub fn clear_bit(self) -> &'a mut W {
102        self.bit(false)
103    }
104    #[doc = r"Writes raw bits to the field"]
105    #[inline(always)]
106    pub fn bit(self, value: bool) -> &'a mut W {
107        self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1);
108        self.w
109    }
110}
111#[doc = "Field `END_TR_ST` reader - End of Channel Transfer Status"]
112pub struct END_TR_ST_R(crate::FieldReader<bool, bool>);
113impl END_TR_ST_R {
114    #[inline(always)]
115    pub(crate) fn new(bits: bool) -> Self {
116        END_TR_ST_R(crate::FieldReader::new(bits))
117    }
118}
119impl core::ops::Deref for END_TR_ST_R {
120    type Target = crate::FieldReader<bool, bool>;
121    #[inline(always)]
122    fn deref(&self) -> &Self::Target {
123        &self.0
124    }
125}
126#[doc = "Field `END_TR_ST` writer - End of Channel Transfer Status"]
127pub struct END_TR_ST_W<'a> {
128    w: &'a mut W,
129}
130impl<'a> END_TR_ST_W<'a> {
131    #[doc = r"Sets the field bit"]
132    #[inline(always)]
133    pub fn set_bit(self) -> &'a mut W {
134        self.bit(true)
135    }
136    #[doc = r"Clears the field bit"]
137    #[inline(always)]
138    pub fn clear_bit(self) -> &'a mut W {
139        self.bit(false)
140    }
141    #[doc = r"Writes raw bits to the field"]
142    #[inline(always)]
143    pub fn bit(self, value: bool) -> &'a mut W {
144        self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4);
145        self.w
146    }
147}
148#[doc = "Field `END_BF_ST` reader - End of Channel Buffer Status"]
149pub struct END_BF_ST_R(crate::FieldReader<bool, bool>);
150impl END_BF_ST_R {
151    #[inline(always)]
152    pub(crate) fn new(bits: bool) -> Self {
153        END_BF_ST_R(crate::FieldReader::new(bits))
154    }
155}
156impl core::ops::Deref for END_BF_ST_R {
157    type Target = crate::FieldReader<bool, bool>;
158    #[inline(always)]
159    fn deref(&self) -> &Self::Target {
160        &self.0
161    }
162}
163#[doc = "Field `END_BF_ST` writer - End of Channel Buffer Status"]
164pub struct END_BF_ST_W<'a> {
165    w: &'a mut W,
166}
167impl<'a> END_BF_ST_W<'a> {
168    #[doc = r"Sets the field bit"]
169    #[inline(always)]
170    pub fn set_bit(self) -> &'a mut W {
171        self.bit(true)
172    }
173    #[doc = r"Clears the field bit"]
174    #[inline(always)]
175    pub fn clear_bit(self) -> &'a mut W {
176        self.bit(false)
177    }
178    #[doc = r"Writes raw bits to the field"]
179    #[inline(always)]
180    pub fn bit(self, value: bool) -> &'a mut W {
181        self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5);
182        self.w
183    }
184}
185#[doc = "Field `DESC_LDST` reader - Descriptor Loaded Status"]
186pub struct DESC_LDST_R(crate::FieldReader<bool, bool>);
187impl DESC_LDST_R {
188    #[inline(always)]
189    pub(crate) fn new(bits: bool) -> Self {
190        DESC_LDST_R(crate::FieldReader::new(bits))
191    }
192}
193impl core::ops::Deref for DESC_LDST_R {
194    type Target = crate::FieldReader<bool, bool>;
195    #[inline(always)]
196    fn deref(&self) -> &Self::Target {
197        &self.0
198    }
199}
200#[doc = "Field `DESC_LDST` writer - Descriptor Loaded Status"]
201pub struct DESC_LDST_W<'a> {
202    w: &'a mut W,
203}
204impl<'a> DESC_LDST_W<'a> {
205    #[doc = r"Sets the field bit"]
206    #[inline(always)]
207    pub fn set_bit(self) -> &'a mut W {
208        self.bit(true)
209    }
210    #[doc = r"Clears the field bit"]
211    #[inline(always)]
212    pub fn clear_bit(self) -> &'a mut W {
213        self.bit(false)
214    }
215    #[doc = r"Writes raw bits to the field"]
216    #[inline(always)]
217    pub fn bit(self, value: bool) -> &'a mut W {
218        self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6);
219        self.w
220    }
221}
222#[doc = "Field `BUFF_COUNT` reader - Buffer Byte Count"]
223pub struct BUFF_COUNT_R(crate::FieldReader<u16, u16>);
224impl BUFF_COUNT_R {
225    #[inline(always)]
226    pub(crate) fn new(bits: u16) -> Self {
227        BUFF_COUNT_R(crate::FieldReader::new(bits))
228    }
229}
230impl core::ops::Deref for BUFF_COUNT_R {
231    type Target = crate::FieldReader<u16, u16>;
232    #[inline(always)]
233    fn deref(&self) -> &Self::Target {
234        &self.0
235    }
236}
237#[doc = "Field `BUFF_COUNT` writer - Buffer Byte Count"]
238pub struct BUFF_COUNT_W<'a> {
239    w: &'a mut W,
240}
241impl<'a> BUFF_COUNT_W<'a> {
242    #[doc = r"Writes raw bits to the field"]
243    #[inline(always)]
244    pub unsafe fn bits(self, value: u16) -> &'a mut W {
245        self.w.bits = (self.w.bits & !(0xffff << 16)) | ((value as u32 & 0xffff) << 16);
246        self.w
247    }
248}
249impl R {
250    #[doc = "Bit 0 - Channel Enable Status"]
251    #[inline(always)]
252    pub fn chann_enb(&self) -> CHANN_ENB_R {
253        CHANN_ENB_R::new((self.bits & 0x01) != 0)
254    }
255    #[doc = "Bit 1 - Channel Active Status"]
256    #[inline(always)]
257    pub fn chann_act(&self) -> CHANN_ACT_R {
258        CHANN_ACT_R::new(((self.bits >> 1) & 0x01) != 0)
259    }
260    #[doc = "Bit 4 - End of Channel Transfer Status"]
261    #[inline(always)]
262    pub fn end_tr_st(&self) -> END_TR_ST_R {
263        END_TR_ST_R::new(((self.bits >> 4) & 0x01) != 0)
264    }
265    #[doc = "Bit 5 - End of Channel Buffer Status"]
266    #[inline(always)]
267    pub fn end_bf_st(&self) -> END_BF_ST_R {
268        END_BF_ST_R::new(((self.bits >> 5) & 0x01) != 0)
269    }
270    #[doc = "Bit 6 - Descriptor Loaded Status"]
271    #[inline(always)]
272    pub fn desc_ldst(&self) -> DESC_LDST_R {
273        DESC_LDST_R::new(((self.bits >> 6) & 0x01) != 0)
274    }
275    #[doc = "Bits 16:31 - Buffer Byte Count"]
276    #[inline(always)]
277    pub fn buff_count(&self) -> BUFF_COUNT_R {
278        BUFF_COUNT_R::new(((self.bits >> 16) & 0xffff) as u16)
279    }
280}
281impl W {
282    #[doc = "Bit 0 - Channel Enable Status"]
283    #[inline(always)]
284    pub fn chann_enb(&mut self) -> CHANN_ENB_W {
285        CHANN_ENB_W { w: self }
286    }
287    #[doc = "Bit 1 - Channel Active Status"]
288    #[inline(always)]
289    pub fn chann_act(&mut self) -> CHANN_ACT_W {
290        CHANN_ACT_W { w: self }
291    }
292    #[doc = "Bit 4 - End of Channel Transfer Status"]
293    #[inline(always)]
294    pub fn end_tr_st(&mut self) -> END_TR_ST_W {
295        END_TR_ST_W { w: self }
296    }
297    #[doc = "Bit 5 - End of Channel Buffer Status"]
298    #[inline(always)]
299    pub fn end_bf_st(&mut self) -> END_BF_ST_W {
300        END_BF_ST_W { w: self }
301    }
302    #[doc = "Bit 6 - Descriptor Loaded Status"]
303    #[inline(always)]
304    pub fn desc_ldst(&mut self) -> DESC_LDST_W {
305        DESC_LDST_W { w: self }
306    }
307    #[doc = "Bits 16:31 - Buffer Byte Count"]
308    #[inline(always)]
309    pub fn buff_count(&mut self) -> BUFF_COUNT_W {
310        BUFF_COUNT_W { w: self }
311    }
312    #[doc = "Writes raw bits to the register."]
313    #[inline(always)]
314    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
315        self.0.bits(bits);
316        self
317    }
318}
319#[doc = "Host DMA Channel Status Register (n = 1)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [usbhs_hstdmastatus](index.html) module"]
320pub struct USBHS_HSTDMASTATUS_SPEC;
321impl crate::RegisterSpec for USBHS_HSTDMASTATUS_SPEC {
322    type Ux = u32;
323}
324#[doc = "`read()` method returns [usbhs_hstdmastatus::R](R) reader structure"]
325impl crate::Readable for USBHS_HSTDMASTATUS_SPEC {
326    type Reader = R;
327}
328#[doc = "`write(|w| ..)` method takes [usbhs_hstdmastatus::W](W) writer structure"]
329impl crate::Writable for USBHS_HSTDMASTATUS_SPEC {
330    type Writer = W;
331}
332#[doc = "`reset()` method sets USBHS_HSTDMASTATUS to value 0"]
333impl crate::Resettable for USBHS_HSTDMASTATUS_SPEC {
334    #[inline(always)]
335    fn reset_value() -> Self::Ux {
336        0
337    }
338}
atsams70n21/usbhs/usbhs_hstdma/usbhs_hstdmastatus.rs

atsams70n21/usbhs/usbhs_hstdma/
usbhs_hstdmastatus.rs
