atsams70n21/supc/
supc_smmr.rs

1#[doc = "Register `SUPC_SMMR` reader"]
2pub struct R(crate::R<SUPC_SMMR_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<SUPC_SMMR_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<SUPC_SMMR_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<SUPC_SMMR_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `SUPC_SMMR` writer"]
17pub struct W(crate::W<SUPC_SMMR_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<SUPC_SMMR_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<SUPC_SMMR_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<SUPC_SMMR_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `SMTH` reader - Supply Monitor Threshold"]
38pub struct SMTH_R(crate::FieldReader<u8, u8>);
39impl SMTH_R {
40    #[inline(always)]
41    pub(crate) fn new(bits: u8) -> Self {
42        SMTH_R(crate::FieldReader::new(bits))
43    }
44}
45impl core::ops::Deref for SMTH_R {
46    type Target = crate::FieldReader<u8, u8>;
47    #[inline(always)]
48    fn deref(&self) -> &Self::Target {
49        &self.0
50    }
51}
52#[doc = "Field `SMTH` writer - Supply Monitor Threshold"]
53pub struct SMTH_W<'a> {
54    w: &'a mut W,
55}
56impl<'a> SMTH_W<'a> {
57    #[doc = r"Writes raw bits to the field"]
58    #[inline(always)]
59    pub unsafe fn bits(self, value: u8) -> &'a mut W {
60        self.w.bits = (self.w.bits & !0x0f) | (value as u32 & 0x0f);
61        self.w
62    }
63}
64#[doc = "Supply Monitor Sampling Period\n\nValue on reset: 0"]
65#[derive(Clone, Copy, Debug, PartialEq)]
66#[repr(u8)]
67pub enum SMSMPL_A {
68    #[doc = "0: Supply Monitor disabled"]
69    SMD = 0,
70    #[doc = "1: Continuous Supply Monitor"]
71    CSM = 1,
72    #[doc = "2: Supply Monitor enabled one SLCK period every 32 SLCK periods"]
73    _32SLCK = 2,
74    #[doc = "3: Supply Monitor enabled one SLCK period every 256 SLCK periods"]
75    _256SLCK = 3,
76    #[doc = "4: Supply Monitor enabled one SLCK period every 2,048 SLCK periods"]
77    _2048SLCK = 4,
78}
79impl From<SMSMPL_A> for u8 {
80    #[inline(always)]
81    fn from(variant: SMSMPL_A) -> Self {
82        variant as _
83    }
84}
85#[doc = "Field `SMSMPL` reader - Supply Monitor Sampling Period"]
86pub struct SMSMPL_R(crate::FieldReader<u8, SMSMPL_A>);
87impl SMSMPL_R {
88    #[inline(always)]
89    pub(crate) fn new(bits: u8) -> Self {
90        SMSMPL_R(crate::FieldReader::new(bits))
91    }
92    #[doc = r"Get enumerated values variant"]
93    #[inline(always)]
94    pub fn variant(&self) -> Option<SMSMPL_A> {
95        match self.bits {
96            0 => Some(SMSMPL_A::SMD),
97            1 => Some(SMSMPL_A::CSM),
98            2 => Some(SMSMPL_A::_32SLCK),
99            3 => Some(SMSMPL_A::_256SLCK),
100            4 => Some(SMSMPL_A::_2048SLCK),
101            _ => None,
102        }
103    }
104    #[doc = "Checks if the value of the field is `SMD`"]
105    #[inline(always)]
106    pub fn is_smd(&self) -> bool {
107        **self == SMSMPL_A::SMD
108    }
109    #[doc = "Checks if the value of the field is `CSM`"]
110    #[inline(always)]
111    pub fn is_csm(&self) -> bool {
112        **self == SMSMPL_A::CSM
113    }
114    #[doc = "Checks if the value of the field is `_32SLCK`"]
115    #[inline(always)]
116    pub fn is_32slck(&self) -> bool {
117        **self == SMSMPL_A::_32SLCK
118    }
119    #[doc = "Checks if the value of the field is `_256SLCK`"]
120    #[inline(always)]
121    pub fn is_256slck(&self) -> bool {
122        **self == SMSMPL_A::_256SLCK
123    }
124    #[doc = "Checks if the value of the field is `_2048SLCK`"]
125    #[inline(always)]
126    pub fn is_2048slck(&self) -> bool {
127        **self == SMSMPL_A::_2048SLCK
128    }
129}
130impl core::ops::Deref for SMSMPL_R {
131    type Target = crate::FieldReader<u8, SMSMPL_A>;
132    #[inline(always)]
133    fn deref(&self) -> &Self::Target {
134        &self.0
135    }
136}
137#[doc = "Field `SMSMPL` writer - Supply Monitor Sampling Period"]
138pub struct SMSMPL_W<'a> {
139    w: &'a mut W,
140}
141impl<'a> SMSMPL_W<'a> {
142    #[doc = r"Writes `variant` to the field"]
143    #[inline(always)]
144    pub fn variant(self, variant: SMSMPL_A) -> &'a mut W {
145        unsafe { self.bits(variant.into()) }
146    }
147    #[doc = "Supply Monitor disabled"]
148    #[inline(always)]
149    pub fn smd(self) -> &'a mut W {
150        self.variant(SMSMPL_A::SMD)
151    }
152    #[doc = "Continuous Supply Monitor"]
153    #[inline(always)]
154    pub fn csm(self) -> &'a mut W {
155        self.variant(SMSMPL_A::CSM)
156    }
157    #[doc = "Supply Monitor enabled one SLCK period every 32 SLCK periods"]
158    #[inline(always)]
159    pub fn _32slck(self) -> &'a mut W {
160        self.variant(SMSMPL_A::_32SLCK)
161    }
162    #[doc = "Supply Monitor enabled one SLCK period every 256 SLCK periods"]
163    #[inline(always)]
164    pub fn _256slck(self) -> &'a mut W {
165        self.variant(SMSMPL_A::_256SLCK)
166    }
167    #[doc = "Supply Monitor enabled one SLCK period every 2,048 SLCK periods"]
168    #[inline(always)]
169    pub fn _2048slck(self) -> &'a mut W {
170        self.variant(SMSMPL_A::_2048SLCK)
171    }
172    #[doc = r"Writes raw bits to the field"]
173    #[inline(always)]
174    pub unsafe fn bits(self, value: u8) -> &'a mut W {
175        self.w.bits = (self.w.bits & !(0x07 << 8)) | ((value as u32 & 0x07) << 8);
176        self.w
177    }
178}
179#[doc = "Supply Monitor Reset Enable\n\nValue on reset: 0"]
180#[derive(Clone, Copy, Debug, PartialEq)]
181pub enum SMRSTEN_A {
182    #[doc = "0: The core reset signal vddcore_nreset is not affected when a supply monitor detection occurs."]
183    NOT_ENABLE = 0,
184    #[doc = "1: The core reset signal, vddcore_nreset is asserted when a supply monitor detection occurs."]
185    ENABLE = 1,
186}
187impl From<SMRSTEN_A> for bool {
188    #[inline(always)]
189    fn from(variant: SMRSTEN_A) -> Self {
190        variant as u8 != 0
191    }
192}
193#[doc = "Field `SMRSTEN` reader - Supply Monitor Reset Enable"]
194pub struct SMRSTEN_R(crate::FieldReader<bool, SMRSTEN_A>);
195impl SMRSTEN_R {
196    #[inline(always)]
197    pub(crate) fn new(bits: bool) -> Self {
198        SMRSTEN_R(crate::FieldReader::new(bits))
199    }
200    #[doc = r"Get enumerated values variant"]
201    #[inline(always)]
202    pub fn variant(&self) -> SMRSTEN_A {
203        match self.bits {
204            false => SMRSTEN_A::NOT_ENABLE,
205            true => SMRSTEN_A::ENABLE,
206        }
207    }
208    #[doc = "Checks if the value of the field is `NOT_ENABLE`"]
209    #[inline(always)]
210    pub fn is_not_enable(&self) -> bool {
211        **self == SMRSTEN_A::NOT_ENABLE
212    }
213    #[doc = "Checks if the value of the field is `ENABLE`"]
214    #[inline(always)]
215    pub fn is_enable(&self) -> bool {
216        **self == SMRSTEN_A::ENABLE
217    }
218}
219impl core::ops::Deref for SMRSTEN_R {
220    type Target = crate::FieldReader<bool, SMRSTEN_A>;
221    #[inline(always)]
222    fn deref(&self) -> &Self::Target {
223        &self.0
224    }
225}
226#[doc = "Field `SMRSTEN` writer - Supply Monitor Reset Enable"]
227pub struct SMRSTEN_W<'a> {
228    w: &'a mut W,
229}
230impl<'a> SMRSTEN_W<'a> {
231    #[doc = r"Writes `variant` to the field"]
232    #[inline(always)]
233    pub fn variant(self, variant: SMRSTEN_A) -> &'a mut W {
234        self.bit(variant.into())
235    }
236    #[doc = "The core reset signal vddcore_nreset is not affected when a supply monitor detection occurs."]
237    #[inline(always)]
238    pub fn not_enable(self) -> &'a mut W {
239        self.variant(SMRSTEN_A::NOT_ENABLE)
240    }
241    #[doc = "The core reset signal, vddcore_nreset is asserted when a supply monitor detection occurs."]
242    #[inline(always)]
243    pub fn enable(self) -> &'a mut W {
244        self.variant(SMRSTEN_A::ENABLE)
245    }
246    #[doc = r"Sets the field bit"]
247    #[inline(always)]
248    pub fn set_bit(self) -> &'a mut W {
249        self.bit(true)
250    }
251    #[doc = r"Clears the field bit"]
252    #[inline(always)]
253    pub fn clear_bit(self) -> &'a mut W {
254        self.bit(false)
255    }
256    #[doc = r"Writes raw bits to the field"]
257    #[inline(always)]
258    pub fn bit(self, value: bool) -> &'a mut W {
259        self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12);
260        self.w
261    }
262}
263#[doc = "Supply Monitor Interrupt Enable\n\nValue on reset: 0"]
264#[derive(Clone, Copy, Debug, PartialEq)]
265pub enum SMIEN_A {
266    #[doc = "0: The SUPC interrupt signal is not affected when a supply monitor detection occurs."]
267    NOT_ENABLE = 0,
268    #[doc = "1: The SUPC interrupt signal is asserted when a supply monitor detection occurs."]
269    ENABLE = 1,
270}
271impl From<SMIEN_A> for bool {
272    #[inline(always)]
273    fn from(variant: SMIEN_A) -> Self {
274        variant as u8 != 0
275    }
276}
277#[doc = "Field `SMIEN` reader - Supply Monitor Interrupt Enable"]
278pub struct SMIEN_R(crate::FieldReader<bool, SMIEN_A>);
279impl SMIEN_R {
280    #[inline(always)]
281    pub(crate) fn new(bits: bool) -> Self {
282        SMIEN_R(crate::FieldReader::new(bits))
283    }
284    #[doc = r"Get enumerated values variant"]
285    #[inline(always)]
286    pub fn variant(&self) -> SMIEN_A {
287        match self.bits {
288            false => SMIEN_A::NOT_ENABLE,
289            true => SMIEN_A::ENABLE,
290        }
291    }
292    #[doc = "Checks if the value of the field is `NOT_ENABLE`"]
293    #[inline(always)]
294    pub fn is_not_enable(&self) -> bool {
295        **self == SMIEN_A::NOT_ENABLE
296    }
297    #[doc = "Checks if the value of the field is `ENABLE`"]
298    #[inline(always)]
299    pub fn is_enable(&self) -> bool {
300        **self == SMIEN_A::ENABLE
301    }
302}
303impl core::ops::Deref for SMIEN_R {
304    type Target = crate::FieldReader<bool, SMIEN_A>;
305    #[inline(always)]
306    fn deref(&self) -> &Self::Target {
307        &self.0
308    }
309}
310#[doc = "Field `SMIEN` writer - Supply Monitor Interrupt Enable"]
311pub struct SMIEN_W<'a> {
312    w: &'a mut W,
313}
314impl<'a> SMIEN_W<'a> {
315    #[doc = r"Writes `variant` to the field"]
316    #[inline(always)]
317    pub fn variant(self, variant: SMIEN_A) -> &'a mut W {
318        self.bit(variant.into())
319    }
320    #[doc = "The SUPC interrupt signal is not affected when a supply monitor detection occurs."]
321    #[inline(always)]
322    pub fn not_enable(self) -> &'a mut W {
323        self.variant(SMIEN_A::NOT_ENABLE)
324    }
325    #[doc = "The SUPC interrupt signal is asserted when a supply monitor detection occurs."]
326    #[inline(always)]
327    pub fn enable(self) -> &'a mut W {
328        self.variant(SMIEN_A::ENABLE)
329    }
330    #[doc = r"Sets the field bit"]
331    #[inline(always)]
332    pub fn set_bit(self) -> &'a mut W {
333        self.bit(true)
334    }
335    #[doc = r"Clears the field bit"]
336    #[inline(always)]
337    pub fn clear_bit(self) -> &'a mut W {
338        self.bit(false)
339    }
340    #[doc = r"Writes raw bits to the field"]
341    #[inline(always)]
342    pub fn bit(self, value: bool) -> &'a mut W {
343        self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13);
344        self.w
345    }
346}
347impl R {
348    #[doc = "Bits 0:3 - Supply Monitor Threshold"]
349    #[inline(always)]
350    pub fn smth(&self) -> SMTH_R {
351        SMTH_R::new((self.bits & 0x0f) as u8)
352    }
353    #[doc = "Bits 8:10 - Supply Monitor Sampling Period"]
354    #[inline(always)]
355    pub fn smsmpl(&self) -> SMSMPL_R {
356        SMSMPL_R::new(((self.bits >> 8) & 0x07) as u8)
357    }
358    #[doc = "Bit 12 - Supply Monitor Reset Enable"]
359    #[inline(always)]
360    pub fn smrsten(&self) -> SMRSTEN_R {
361        SMRSTEN_R::new(((self.bits >> 12) & 0x01) != 0)
362    }
363    #[doc = "Bit 13 - Supply Monitor Interrupt Enable"]
364    #[inline(always)]
365    pub fn smien(&self) -> SMIEN_R {
366        SMIEN_R::new(((self.bits >> 13) & 0x01) != 0)
367    }
368}
369impl W {
370    #[doc = "Bits 0:3 - Supply Monitor Threshold"]
371    #[inline(always)]
372    pub fn smth(&mut self) -> SMTH_W {
373        SMTH_W { w: self }
374    }
375    #[doc = "Bits 8:10 - Supply Monitor Sampling Period"]
376    #[inline(always)]
377    pub fn smsmpl(&mut self) -> SMSMPL_W {
378        SMSMPL_W { w: self }
379    }
380    #[doc = "Bit 12 - Supply Monitor Reset Enable"]
381    #[inline(always)]
382    pub fn smrsten(&mut self) -> SMRSTEN_W {
383        SMRSTEN_W { w: self }
384    }
385    #[doc = "Bit 13 - Supply Monitor Interrupt Enable"]
386    #[inline(always)]
387    pub fn smien(&mut self) -> SMIEN_W {
388        SMIEN_W { w: self }
389    }
390    #[doc = "Writes raw bits to the register."]
391    #[inline(always)]
392    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
393        self.0.bits(bits);
394        self
395    }
396}
397#[doc = "Supply Controller Supply Monitor Mode Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [supc_smmr](index.html) module"]
398pub struct SUPC_SMMR_SPEC;
399impl crate::RegisterSpec for SUPC_SMMR_SPEC {
400    type Ux = u32;
401}
402#[doc = "`read()` method returns [supc_smmr::R](R) reader structure"]
403impl crate::Readable for SUPC_SMMR_SPEC {
404    type Reader = R;
405}
406#[doc = "`write(|w| ..)` method takes [supc_smmr::W](W) writer structure"]
407impl crate::Writable for SUPC_SMMR_SPEC {
408    type Writer = W;
409}
410#[doc = "`reset()` method sets SUPC_SMMR to value 0"]
411impl crate::Resettable for SUPC_SMMR_SPEC {
412    #[inline(always)]
413    fn reset_value() -> Self::Ux {
414        0
415    }
416}
atsams70n21/supc/supc_smmr.rs

atsams70n21/supc/
supc_smmr.rs
