atsams70n21/dacc/
dacc_chsr.rs1#[doc = "Register `DACC_CHSR` reader"]
2pub struct R(crate::R<DACC_CHSR_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<DACC_CHSR_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<DACC_CHSR_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<DACC_CHSR_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Field `CH0` reader - Channel 0 Status"]
17pub struct CH0_R(crate::FieldReader<bool, bool>);
18impl CH0_R {
19 #[inline(always)]
20 pub(crate) fn new(bits: bool) -> Self {
21 CH0_R(crate::FieldReader::new(bits))
22 }
23}
24impl core::ops::Deref for CH0_R {
25 type Target = crate::FieldReader<bool, bool>;
26 #[inline(always)]
27 fn deref(&self) -> &Self::Target {
28 &self.0
29 }
30}
31#[doc = "Field `CH1` reader - Channel 1 Status"]
32pub struct CH1_R(crate::FieldReader<bool, bool>);
33impl CH1_R {
34 #[inline(always)]
35 pub(crate) fn new(bits: bool) -> Self {
36 CH1_R(crate::FieldReader::new(bits))
37 }
38}
39impl core::ops::Deref for CH1_R {
40 type Target = crate::FieldReader<bool, bool>;
41 #[inline(always)]
42 fn deref(&self) -> &Self::Target {
43 &self.0
44 }
45}
46#[doc = "Field `DACRDY0` reader - DAC Ready Flag"]
47pub struct DACRDY0_R(crate::FieldReader<bool, bool>);
48impl DACRDY0_R {
49 #[inline(always)]
50 pub(crate) fn new(bits: bool) -> Self {
51 DACRDY0_R(crate::FieldReader::new(bits))
52 }
53}
54impl core::ops::Deref for DACRDY0_R {
55 type Target = crate::FieldReader<bool, bool>;
56 #[inline(always)]
57 fn deref(&self) -> &Self::Target {
58 &self.0
59 }
60}
61#[doc = "Field `DACRDY1` reader - DAC Ready Flag"]
62pub struct DACRDY1_R(crate::FieldReader<bool, bool>);
63impl DACRDY1_R {
64 #[inline(always)]
65 pub(crate) fn new(bits: bool) -> Self {
66 DACRDY1_R(crate::FieldReader::new(bits))
67 }
68}
69impl core::ops::Deref for DACRDY1_R {
70 type Target = crate::FieldReader<bool, bool>;
71 #[inline(always)]
72 fn deref(&self) -> &Self::Target {
73 &self.0
74 }
75}
76impl R {
77 #[doc = "Bit 0 - Channel 0 Status"]
78 #[inline(always)]
79 pub fn ch0(&self) -> CH0_R {
80 CH0_R::new((self.bits & 0x01) != 0)
81 }
82 #[doc = "Bit 1 - Channel 1 Status"]
83 #[inline(always)]
84 pub fn ch1(&self) -> CH1_R {
85 CH1_R::new(((self.bits >> 1) & 0x01) != 0)
86 }
87 #[doc = "Bit 8 - DAC Ready Flag"]
88 #[inline(always)]
89 pub fn dacrdy0(&self) -> DACRDY0_R {
90 DACRDY0_R::new(((self.bits >> 8) & 0x01) != 0)
91 }
92 #[doc = "Bit 9 - DAC Ready Flag"]
93 #[inline(always)]
94 pub fn dacrdy1(&self) -> DACRDY1_R {
95 DACRDY1_R::new(((self.bits >> 9) & 0x01) != 0)
96 }
97}
98#[doc = "Channel Status Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dacc_chsr](index.html) module"]
99pub struct DACC_CHSR_SPEC;
100impl crate::RegisterSpec for DACC_CHSR_SPEC {
101 type Ux = u32;
102}
103#[doc = "`read()` method returns [dacc_chsr::R](R) reader structure"]
104impl crate::Readable for DACC_CHSR_SPEC {
105 type Reader = R;
106}
107#[doc = "`reset()` method sets DACC_CHSR to value 0"]
108impl crate::Resettable for DACC_CHSR_SPEC {
109 #[inline(always)]
110 fn reset_value() -> Self::Ux {
111 0
112 }
113}