atsams70n21/xdmac/
xdmac_gcfg.rs

1#[doc = "Register `XDMAC_GCFG` reader"]
2pub struct R(crate::R<XDMAC_GCFG_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<XDMAC_GCFG_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<XDMAC_GCFG_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<XDMAC_GCFG_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `XDMAC_GCFG` writer"]
17pub struct W(crate::W<XDMAC_GCFG_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<XDMAC_GCFG_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<XDMAC_GCFG_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<XDMAC_GCFG_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `CGDISREG` reader - Configuration Registers Clock Gating Disable"]
38pub struct CGDISREG_R(crate::FieldReader<bool, bool>);
39impl CGDISREG_R {
40    #[inline(always)]
41    pub(crate) fn new(bits: bool) -> Self {
42        CGDISREG_R(crate::FieldReader::new(bits))
43    }
44}
45impl core::ops::Deref for CGDISREG_R {
46    type Target = crate::FieldReader<bool, bool>;
47    #[inline(always)]
48    fn deref(&self) -> &Self::Target {
49        &self.0
50    }
51}
52#[doc = "Field `CGDISREG` writer - Configuration Registers Clock Gating Disable"]
53pub struct CGDISREG_W<'a> {
54    w: &'a mut W,
55}
56impl<'a> CGDISREG_W<'a> {
57    #[doc = r"Sets the field bit"]
58    #[inline(always)]
59    pub fn set_bit(self) -> &'a mut W {
60        self.bit(true)
61    }
62    #[doc = r"Clears the field bit"]
63    #[inline(always)]
64    pub fn clear_bit(self) -> &'a mut W {
65        self.bit(false)
66    }
67    #[doc = r"Writes raw bits to the field"]
68    #[inline(always)]
69    pub fn bit(self, value: bool) -> &'a mut W {
70        self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01);
71        self.w
72    }
73}
74#[doc = "Field `CGDISPIPE` reader - Pipeline Clock Gating Disable"]
75pub struct CGDISPIPE_R(crate::FieldReader<bool, bool>);
76impl CGDISPIPE_R {
77    #[inline(always)]
78    pub(crate) fn new(bits: bool) -> Self {
79        CGDISPIPE_R(crate::FieldReader::new(bits))
80    }
81}
82impl core::ops::Deref for CGDISPIPE_R {
83    type Target = crate::FieldReader<bool, bool>;
84    #[inline(always)]
85    fn deref(&self) -> &Self::Target {
86        &self.0
87    }
88}
89#[doc = "Field `CGDISPIPE` writer - Pipeline Clock Gating Disable"]
90pub struct CGDISPIPE_W<'a> {
91    w: &'a mut W,
92}
93impl<'a> CGDISPIPE_W<'a> {
94    #[doc = r"Sets the field bit"]
95    #[inline(always)]
96    pub fn set_bit(self) -> &'a mut W {
97        self.bit(true)
98    }
99    #[doc = r"Clears the field bit"]
100    #[inline(always)]
101    pub fn clear_bit(self) -> &'a mut W {
102        self.bit(false)
103    }
104    #[doc = r"Writes raw bits to the field"]
105    #[inline(always)]
106    pub fn bit(self, value: bool) -> &'a mut W {
107        self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1);
108        self.w
109    }
110}
111#[doc = "Field `CGDISFIFO` reader - FIFO Clock Gating Disable"]
112pub struct CGDISFIFO_R(crate::FieldReader<bool, bool>);
113impl CGDISFIFO_R {
114    #[inline(always)]
115    pub(crate) fn new(bits: bool) -> Self {
116        CGDISFIFO_R(crate::FieldReader::new(bits))
117    }
118}
119impl core::ops::Deref for CGDISFIFO_R {
120    type Target = crate::FieldReader<bool, bool>;
121    #[inline(always)]
122    fn deref(&self) -> &Self::Target {
123        &self.0
124    }
125}
126#[doc = "Field `CGDISFIFO` writer - FIFO Clock Gating Disable"]
127pub struct CGDISFIFO_W<'a> {
128    w: &'a mut W,
129}
130impl<'a> CGDISFIFO_W<'a> {
131    #[doc = r"Sets the field bit"]
132    #[inline(always)]
133    pub fn set_bit(self) -> &'a mut W {
134        self.bit(true)
135    }
136    #[doc = r"Clears the field bit"]
137    #[inline(always)]
138    pub fn clear_bit(self) -> &'a mut W {
139        self.bit(false)
140    }
141    #[doc = r"Writes raw bits to the field"]
142    #[inline(always)]
143    pub fn bit(self, value: bool) -> &'a mut W {
144        self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2);
145        self.w
146    }
147}
148#[doc = "Field `CGDISIF` reader - Bus Interface Clock Gating Disable"]
149pub struct CGDISIF_R(crate::FieldReader<bool, bool>);
150impl CGDISIF_R {
151    #[inline(always)]
152    pub(crate) fn new(bits: bool) -> Self {
153        CGDISIF_R(crate::FieldReader::new(bits))
154    }
155}
156impl core::ops::Deref for CGDISIF_R {
157    type Target = crate::FieldReader<bool, bool>;
158    #[inline(always)]
159    fn deref(&self) -> &Self::Target {
160        &self.0
161    }
162}
163#[doc = "Field `CGDISIF` writer - Bus Interface Clock Gating Disable"]
164pub struct CGDISIF_W<'a> {
165    w: &'a mut W,
166}
167impl<'a> CGDISIF_W<'a> {
168    #[doc = r"Sets the field bit"]
169    #[inline(always)]
170    pub fn set_bit(self) -> &'a mut W {
171        self.bit(true)
172    }
173    #[doc = r"Clears the field bit"]
174    #[inline(always)]
175    pub fn clear_bit(self) -> &'a mut W {
176        self.bit(false)
177    }
178    #[doc = r"Writes raw bits to the field"]
179    #[inline(always)]
180    pub fn bit(self, value: bool) -> &'a mut W {
181        self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3);
182        self.w
183    }
184}
185#[doc = "Field `BXKBEN` reader - Boundary X Kilobyte Enable"]
186pub struct BXKBEN_R(crate::FieldReader<bool, bool>);
187impl BXKBEN_R {
188    #[inline(always)]
189    pub(crate) fn new(bits: bool) -> Self {
190        BXKBEN_R(crate::FieldReader::new(bits))
191    }
192}
193impl core::ops::Deref for BXKBEN_R {
194    type Target = crate::FieldReader<bool, bool>;
195    #[inline(always)]
196    fn deref(&self) -> &Self::Target {
197        &self.0
198    }
199}
200#[doc = "Field `BXKBEN` writer - Boundary X Kilobyte Enable"]
201pub struct BXKBEN_W<'a> {
202    w: &'a mut W,
203}
204impl<'a> BXKBEN_W<'a> {
205    #[doc = r"Sets the field bit"]
206    #[inline(always)]
207    pub fn set_bit(self) -> &'a mut W {
208        self.bit(true)
209    }
210    #[doc = r"Clears the field bit"]
211    #[inline(always)]
212    pub fn clear_bit(self) -> &'a mut W {
213        self.bit(false)
214    }
215    #[doc = r"Writes raw bits to the field"]
216    #[inline(always)]
217    pub fn bit(self, value: bool) -> &'a mut W {
218        self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8);
219        self.w
220    }
221}
222impl R {
223    #[doc = "Bit 0 - Configuration Registers Clock Gating Disable"]
224    #[inline(always)]
225    pub fn cgdisreg(&self) -> CGDISREG_R {
226        CGDISREG_R::new((self.bits & 0x01) != 0)
227    }
228    #[doc = "Bit 1 - Pipeline Clock Gating Disable"]
229    #[inline(always)]
230    pub fn cgdispipe(&self) -> CGDISPIPE_R {
231        CGDISPIPE_R::new(((self.bits >> 1) & 0x01) != 0)
232    }
233    #[doc = "Bit 2 - FIFO Clock Gating Disable"]
234    #[inline(always)]
235    pub fn cgdisfifo(&self) -> CGDISFIFO_R {
236        CGDISFIFO_R::new(((self.bits >> 2) & 0x01) != 0)
237    }
238    #[doc = "Bit 3 - Bus Interface Clock Gating Disable"]
239    #[inline(always)]
240    pub fn cgdisif(&self) -> CGDISIF_R {
241        CGDISIF_R::new(((self.bits >> 3) & 0x01) != 0)
242    }
243    #[doc = "Bit 8 - Boundary X Kilobyte Enable"]
244    #[inline(always)]
245    pub fn bxkben(&self) -> BXKBEN_R {
246        BXKBEN_R::new(((self.bits >> 8) & 0x01) != 0)
247    }
248}
249impl W {
250    #[doc = "Bit 0 - Configuration Registers Clock Gating Disable"]
251    #[inline(always)]
252    pub fn cgdisreg(&mut self) -> CGDISREG_W {
253        CGDISREG_W { w: self }
254    }
255    #[doc = "Bit 1 - Pipeline Clock Gating Disable"]
256    #[inline(always)]
257    pub fn cgdispipe(&mut self) -> CGDISPIPE_W {
258        CGDISPIPE_W { w: self }
259    }
260    #[doc = "Bit 2 - FIFO Clock Gating Disable"]
261    #[inline(always)]
262    pub fn cgdisfifo(&mut self) -> CGDISFIFO_W {
263        CGDISFIFO_W { w: self }
264    }
265    #[doc = "Bit 3 - Bus Interface Clock Gating Disable"]
266    #[inline(always)]
267    pub fn cgdisif(&mut self) -> CGDISIF_W {
268        CGDISIF_W { w: self }
269    }
270    #[doc = "Bit 8 - Boundary X Kilobyte Enable"]
271    #[inline(always)]
272    pub fn bxkben(&mut self) -> BXKBEN_W {
273        BXKBEN_W { w: self }
274    }
275    #[doc = "Writes raw bits to the register."]
276    #[inline(always)]
277    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
278        self.0.bits(bits);
279        self
280    }
281}
282#[doc = "Global Configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [xdmac_gcfg](index.html) module"]
283pub struct XDMAC_GCFG_SPEC;
284impl crate::RegisterSpec for XDMAC_GCFG_SPEC {
285    type Ux = u32;
286}
287#[doc = "`read()` method returns [xdmac_gcfg::R](R) reader structure"]
288impl crate::Readable for XDMAC_GCFG_SPEC {
289    type Reader = R;
290}
291#[doc = "`write(|w| ..)` method takes [xdmac_gcfg::W](W) writer structure"]
292impl crate::Writable for XDMAC_GCFG_SPEC {
293    type Writer = W;
294}
295#[doc = "`reset()` method sets XDMAC_GCFG to value 0"]
296impl crate::Resettable for XDMAC_GCFG_SPEC {
297    #[inline(always)]
298    fn reset_value() -> Self::Ux {
299        0
300    }
301}
atsams70n21/xdmac/xdmac_gcfg.rs

atsams70n21/xdmac/
xdmac_gcfg.rs
