[−][src]Struct atsams70n19b::twihs0::RegisterBlock

#[repr(C)]
pub struct RegisterBlock {
    pub twihs_cr: TWIHS_CR,
    pub twihs_mmr: TWIHS_MMR,
    pub twihs_smr: TWIHS_SMR,
    pub twihs_iadr: TWIHS_IADR,
    pub twihs_cwgr: TWIHS_CWGR,
    pub twihs_sr: TWIHS_SR,
    pub twihs_ier: TWIHS_IER,
    pub twihs_idr: TWIHS_IDR,
    pub twihs_imr: TWIHS_IMR,
    pub twihs_rhr: TWIHS_RHR,
    pub twihs_thr: TWIHS_THR,
    pub twihs_smbtr: TWIHS_SMBTR,
    pub twihs_filtr: TWIHS_FILTR,
    pub twihs_swmr: TWIHS_SWMR,
    pub twihs_wpmr: TWIHS_WPMR,
    pub twihs_wpsr: TWIHS_WPSR,
    // some fields omitted
}

Register block

Fields

twihs_cr: TWIHS_CR

0x00 - Control Register

twihs_mmr: TWIHS_MMR

0x04 - Master Mode Register

twihs_smr: TWIHS_SMR

0x08 - Slave Mode Register

twihs_iadr: TWIHS_IADR

0x0c - Internal Address Register

twihs_cwgr: TWIHS_CWGR

0x10 - Clock Waveform Generator Register

twihs_sr: TWIHS_SR

0x20 - Status Register

twihs_ier: TWIHS_IER

0x24 - Interrupt Enable Register

twihs_idr: TWIHS_IDR

0x28 - Interrupt Disable Register

twihs_imr: TWIHS_IMR

0x2c - Interrupt Mask Register

twihs_rhr: TWIHS_RHR

0x30 - Receive Holding Register

twihs_thr: TWIHS_THR

0x34 - Transmit Holding Register

twihs_smbtr: TWIHS_SMBTR

0x38 - SMBus Timing Register

twihs_filtr: TWIHS_FILTR

0x44 - Filter Register

twihs_swmr: TWIHS_SWMR

0x4c - SleepWalking Matching Register

twihs_wpmr: TWIHS_WPMR

0xe4 - Write Protection Mode Register

twihs_wpsr: TWIHS_WPSR

0xe8 - Write Protection Status Register

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