atsams70j21/ssc/
ssc_rcmr.rs

1#[doc = "Register `SSC_RCMR` reader"]
2pub struct R(crate::R<SSC_RCMR_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<SSC_RCMR_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<SSC_RCMR_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<SSC_RCMR_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `SSC_RCMR` writer"]
17pub struct W(crate::W<SSC_RCMR_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<SSC_RCMR_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<SSC_RCMR_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<SSC_RCMR_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Receive Clock Selection\n\nValue on reset: 0"]
38#[derive(Clone, Copy, Debug, PartialEq)]
39#[repr(u8)]
40pub enum CKS_A {
41    #[doc = "0: Divided Clock"]
42    MCK = 0,
43    #[doc = "1: TK Clock signal"]
44    TK = 1,
45    #[doc = "2: RK pin"]
46    RK = 2,
47}
48impl From<CKS_A> for u8 {
49    #[inline(always)]
50    fn from(variant: CKS_A) -> Self {
51        variant as _
52    }
53}
54#[doc = "Field `CKS` reader - Receive Clock Selection"]
55pub struct CKS_R(crate::FieldReader<u8, CKS_A>);
56impl CKS_R {
57    #[inline(always)]
58    pub(crate) fn new(bits: u8) -> Self {
59        CKS_R(crate::FieldReader::new(bits))
60    }
61    #[doc = r"Get enumerated values variant"]
62    #[inline(always)]
63    pub fn variant(&self) -> Option<CKS_A> {
64        match self.bits {
65            0 => Some(CKS_A::MCK),
66            1 => Some(CKS_A::TK),
67            2 => Some(CKS_A::RK),
68            _ => None,
69        }
70    }
71    #[doc = "Checks if the value of the field is `MCK`"]
72    #[inline(always)]
73    pub fn is_mck(&self) -> bool {
74        **self == CKS_A::MCK
75    }
76    #[doc = "Checks if the value of the field is `TK`"]
77    #[inline(always)]
78    pub fn is_tk(&self) -> bool {
79        **self == CKS_A::TK
80    }
81    #[doc = "Checks if the value of the field is `RK`"]
82    #[inline(always)]
83    pub fn is_rk(&self) -> bool {
84        **self == CKS_A::RK
85    }
86}
87impl core::ops::Deref for CKS_R {
88    type Target = crate::FieldReader<u8, CKS_A>;
89    #[inline(always)]
90    fn deref(&self) -> &Self::Target {
91        &self.0
92    }
93}
94#[doc = "Field `CKS` writer - Receive Clock Selection"]
95pub struct CKS_W<'a> {
96    w: &'a mut W,
97}
98impl<'a> CKS_W<'a> {
99    #[doc = r"Writes `variant` to the field"]
100    #[inline(always)]
101    pub fn variant(self, variant: CKS_A) -> &'a mut W {
102        unsafe { self.bits(variant.into()) }
103    }
104    #[doc = "Divided Clock"]
105    #[inline(always)]
106    pub fn mck(self) -> &'a mut W {
107        self.variant(CKS_A::MCK)
108    }
109    #[doc = "TK Clock signal"]
110    #[inline(always)]
111    pub fn tk(self) -> &'a mut W {
112        self.variant(CKS_A::TK)
113    }
114    #[doc = "RK pin"]
115    #[inline(always)]
116    pub fn rk(self) -> &'a mut W {
117        self.variant(CKS_A::RK)
118    }
119    #[doc = r"Writes raw bits to the field"]
120    #[inline(always)]
121    pub unsafe fn bits(self, value: u8) -> &'a mut W {
122        self.w.bits = (self.w.bits & !0x03) | (value as u32 & 0x03);
123        self.w
124    }
125}
126#[doc = "Receive Clock Output Mode Selection\n\nValue on reset: 0"]
127#[derive(Clone, Copy, Debug, PartialEq)]
128#[repr(u8)]
129pub enum CKO_A {
130    #[doc = "0: None, RK pin is an input"]
131    NONE = 0,
132    #[doc = "1: Continuous Receive Clock, RK pin is an output"]
133    CONTINUOUS = 1,
134    #[doc = "2: Receive Clock only during data transfers, RK pin is an output"]
135    TRANSFER = 2,
136}
137impl From<CKO_A> for u8 {
138    #[inline(always)]
139    fn from(variant: CKO_A) -> Self {
140        variant as _
141    }
142}
143#[doc = "Field `CKO` reader - Receive Clock Output Mode Selection"]
144pub struct CKO_R(crate::FieldReader<u8, CKO_A>);
145impl CKO_R {
146    #[inline(always)]
147    pub(crate) fn new(bits: u8) -> Self {
148        CKO_R(crate::FieldReader::new(bits))
149    }
150    #[doc = r"Get enumerated values variant"]
151    #[inline(always)]
152    pub fn variant(&self) -> Option<CKO_A> {
153        match self.bits {
154            0 => Some(CKO_A::NONE),
155            1 => Some(CKO_A::CONTINUOUS),
156            2 => Some(CKO_A::TRANSFER),
157            _ => None,
158        }
159    }
160    #[doc = "Checks if the value of the field is `NONE`"]
161    #[inline(always)]
162    pub fn is_none(&self) -> bool {
163        **self == CKO_A::NONE
164    }
165    #[doc = "Checks if the value of the field is `CONTINUOUS`"]
166    #[inline(always)]
167    pub fn is_continuous(&self) -> bool {
168        **self == CKO_A::CONTINUOUS
169    }
170    #[doc = "Checks if the value of the field is `TRANSFER`"]
171    #[inline(always)]
172    pub fn is_transfer(&self) -> bool {
173        **self == CKO_A::TRANSFER
174    }
175}
176impl core::ops::Deref for CKO_R {
177    type Target = crate::FieldReader<u8, CKO_A>;
178    #[inline(always)]
179    fn deref(&self) -> &Self::Target {
180        &self.0
181    }
182}
183#[doc = "Field `CKO` writer - Receive Clock Output Mode Selection"]
184pub struct CKO_W<'a> {
185    w: &'a mut W,
186}
187impl<'a> CKO_W<'a> {
188    #[doc = r"Writes `variant` to the field"]
189    #[inline(always)]
190    pub fn variant(self, variant: CKO_A) -> &'a mut W {
191        unsafe { self.bits(variant.into()) }
192    }
193    #[doc = "None, RK pin is an input"]
194    #[inline(always)]
195    pub fn none(self) -> &'a mut W {
196        self.variant(CKO_A::NONE)
197    }
198    #[doc = "Continuous Receive Clock, RK pin is an output"]
199    #[inline(always)]
200    pub fn continuous(self) -> &'a mut W {
201        self.variant(CKO_A::CONTINUOUS)
202    }
203    #[doc = "Receive Clock only during data transfers, RK pin is an output"]
204    #[inline(always)]
205    pub fn transfer(self) -> &'a mut W {
206        self.variant(CKO_A::TRANSFER)
207    }
208    #[doc = r"Writes raw bits to the field"]
209    #[inline(always)]
210    pub unsafe fn bits(self, value: u8) -> &'a mut W {
211        self.w.bits = (self.w.bits & !(0x07 << 2)) | ((value as u32 & 0x07) << 2);
212        self.w
213    }
214}
215#[doc = "Field `CKI` reader - Receive Clock Inversion"]
216pub struct CKI_R(crate::FieldReader<bool, bool>);
217impl CKI_R {
218    #[inline(always)]
219    pub(crate) fn new(bits: bool) -> Self {
220        CKI_R(crate::FieldReader::new(bits))
221    }
222}
223impl core::ops::Deref for CKI_R {
224    type Target = crate::FieldReader<bool, bool>;
225    #[inline(always)]
226    fn deref(&self) -> &Self::Target {
227        &self.0
228    }
229}
230#[doc = "Field `CKI` writer - Receive Clock Inversion"]
231pub struct CKI_W<'a> {
232    w: &'a mut W,
233}
234impl<'a> CKI_W<'a> {
235    #[doc = r"Sets the field bit"]
236    #[inline(always)]
237    pub fn set_bit(self) -> &'a mut W {
238        self.bit(true)
239    }
240    #[doc = r"Clears the field bit"]
241    #[inline(always)]
242    pub fn clear_bit(self) -> &'a mut W {
243        self.bit(false)
244    }
245    #[doc = r"Writes raw bits to the field"]
246    #[inline(always)]
247    pub fn bit(self, value: bool) -> &'a mut W {
248        self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5);
249        self.w
250    }
251}
252#[doc = "Receive Clock Gating Selection\n\nValue on reset: 0"]
253#[derive(Clone, Copy, Debug, PartialEq)]
254#[repr(u8)]
255pub enum CKG_A {
256    #[doc = "0: None"]
257    CONTINUOUS = 0,
258    #[doc = "1: Receive Clock enabled only if RF Low"]
259    EN_RF_LOW = 1,
260    #[doc = "2: Receive Clock enabled only if RF High"]
261    EN_RF_HIGH = 2,
262}
263impl From<CKG_A> for u8 {
264    #[inline(always)]
265    fn from(variant: CKG_A) -> Self {
266        variant as _
267    }
268}
269#[doc = "Field `CKG` reader - Receive Clock Gating Selection"]
270pub struct CKG_R(crate::FieldReader<u8, CKG_A>);
271impl CKG_R {
272    #[inline(always)]
273    pub(crate) fn new(bits: u8) -> Self {
274        CKG_R(crate::FieldReader::new(bits))
275    }
276    #[doc = r"Get enumerated values variant"]
277    #[inline(always)]
278    pub fn variant(&self) -> Option<CKG_A> {
279        match self.bits {
280            0 => Some(CKG_A::CONTINUOUS),
281            1 => Some(CKG_A::EN_RF_LOW),
282            2 => Some(CKG_A::EN_RF_HIGH),
283            _ => None,
284        }
285    }
286    #[doc = "Checks if the value of the field is `CONTINUOUS`"]
287    #[inline(always)]
288    pub fn is_continuous(&self) -> bool {
289        **self == CKG_A::CONTINUOUS
290    }
291    #[doc = "Checks if the value of the field is `EN_RF_LOW`"]
292    #[inline(always)]
293    pub fn is_en_rf_low(&self) -> bool {
294        **self == CKG_A::EN_RF_LOW
295    }
296    #[doc = "Checks if the value of the field is `EN_RF_HIGH`"]
297    #[inline(always)]
298    pub fn is_en_rf_high(&self) -> bool {
299        **self == CKG_A::EN_RF_HIGH
300    }
301}
302impl core::ops::Deref for CKG_R {
303    type Target = crate::FieldReader<u8, CKG_A>;
304    #[inline(always)]
305    fn deref(&self) -> &Self::Target {
306        &self.0
307    }
308}
309#[doc = "Field `CKG` writer - Receive Clock Gating Selection"]
310pub struct CKG_W<'a> {
311    w: &'a mut W,
312}
313impl<'a> CKG_W<'a> {
314    #[doc = r"Writes `variant` to the field"]
315    #[inline(always)]
316    pub fn variant(self, variant: CKG_A) -> &'a mut W {
317        unsafe { self.bits(variant.into()) }
318    }
319    #[doc = "None"]
320    #[inline(always)]
321    pub fn continuous(self) -> &'a mut W {
322        self.variant(CKG_A::CONTINUOUS)
323    }
324    #[doc = "Receive Clock enabled only if RF Low"]
325    #[inline(always)]
326    pub fn en_rf_low(self) -> &'a mut W {
327        self.variant(CKG_A::EN_RF_LOW)
328    }
329    #[doc = "Receive Clock enabled only if RF High"]
330    #[inline(always)]
331    pub fn en_rf_high(self) -> &'a mut W {
332        self.variant(CKG_A::EN_RF_HIGH)
333    }
334    #[doc = r"Writes raw bits to the field"]
335    #[inline(always)]
336    pub unsafe fn bits(self, value: u8) -> &'a mut W {
337        self.w.bits = (self.w.bits & !(0x03 << 6)) | ((value as u32 & 0x03) << 6);
338        self.w
339    }
340}
341#[doc = "Receive Start Selection\n\nValue on reset: 0"]
342#[derive(Clone, Copy, Debug, PartialEq)]
343#[repr(u8)]
344pub enum START_A {
345    #[doc = "0: Continuous, as soon as the receiver is enabled, and immediately after the end of transfer of the previous data."]
346    CONTINUOUS = 0,
347    #[doc = "1: Transmit start"]
348    TRANSMIT = 1,
349    #[doc = "2: Detection of a low level on RF signal"]
350    RF_LOW = 2,
351    #[doc = "3: Detection of a high level on RF signal"]
352    RF_HIGH = 3,
353    #[doc = "4: Detection of a falling edge on RF signal"]
354    RF_FALLING = 4,
355    #[doc = "5: Detection of a rising edge on RF signal"]
356    RF_RISING = 5,
357    #[doc = "6: Detection of any level change on RF signal"]
358    RF_LEVEL = 6,
359    #[doc = "7: Detection of any edge on RF signal"]
360    RF_EDGE = 7,
361    #[doc = "8: Compare 0"]
362    CMP_0 = 8,
363}
364impl From<START_A> for u8 {
365    #[inline(always)]
366    fn from(variant: START_A) -> Self {
367        variant as _
368    }
369}
370#[doc = "Field `START` reader - Receive Start Selection"]
371pub struct START_R(crate::FieldReader<u8, START_A>);
372impl START_R {
373    #[inline(always)]
374    pub(crate) fn new(bits: u8) -> Self {
375        START_R(crate::FieldReader::new(bits))
376    }
377    #[doc = r"Get enumerated values variant"]
378    #[inline(always)]
379    pub fn variant(&self) -> Option<START_A> {
380        match self.bits {
381            0 => Some(START_A::CONTINUOUS),
382            1 => Some(START_A::TRANSMIT),
383            2 => Some(START_A::RF_LOW),
384            3 => Some(START_A::RF_HIGH),
385            4 => Some(START_A::RF_FALLING),
386            5 => Some(START_A::RF_RISING),
387            6 => Some(START_A::RF_LEVEL),
388            7 => Some(START_A::RF_EDGE),
389            8 => Some(START_A::CMP_0),
390            _ => None,
391        }
392    }
393    #[doc = "Checks if the value of the field is `CONTINUOUS`"]
394    #[inline(always)]
395    pub fn is_continuous(&self) -> bool {
396        **self == START_A::CONTINUOUS
397    }
398    #[doc = "Checks if the value of the field is `TRANSMIT`"]
399    #[inline(always)]
400    pub fn is_transmit(&self) -> bool {
401        **self == START_A::TRANSMIT
402    }
403    #[doc = "Checks if the value of the field is `RF_LOW`"]
404    #[inline(always)]
405    pub fn is_rf_low(&self) -> bool {
406        **self == START_A::RF_LOW
407    }
408    #[doc = "Checks if the value of the field is `RF_HIGH`"]
409    #[inline(always)]
410    pub fn is_rf_high(&self) -> bool {
411        **self == START_A::RF_HIGH
412    }
413    #[doc = "Checks if the value of the field is `RF_FALLING`"]
414    #[inline(always)]
415    pub fn is_rf_falling(&self) -> bool {
416        **self == START_A::RF_FALLING
417    }
418    #[doc = "Checks if the value of the field is `RF_RISING`"]
419    #[inline(always)]
420    pub fn is_rf_rising(&self) -> bool {
421        **self == START_A::RF_RISING
422    }
423    #[doc = "Checks if the value of the field is `RF_LEVEL`"]
424    #[inline(always)]
425    pub fn is_rf_level(&self) -> bool {
426        **self == START_A::RF_LEVEL
427    }
428    #[doc = "Checks if the value of the field is `RF_EDGE`"]
429    #[inline(always)]
430    pub fn is_rf_edge(&self) -> bool {
431        **self == START_A::RF_EDGE
432    }
433    #[doc = "Checks if the value of the field is `CMP_0`"]
434    #[inline(always)]
435    pub fn is_cmp_0(&self) -> bool {
436        **self == START_A::CMP_0
437    }
438}
439impl core::ops::Deref for START_R {
440    type Target = crate::FieldReader<u8, START_A>;
441    #[inline(always)]
442    fn deref(&self) -> &Self::Target {
443        &self.0
444    }
445}
446#[doc = "Field `START` writer - Receive Start Selection"]
447pub struct START_W<'a> {
448    w: &'a mut W,
449}
450impl<'a> START_W<'a> {
451    #[doc = r"Writes `variant` to the field"]
452    #[inline(always)]
453    pub fn variant(self, variant: START_A) -> &'a mut W {
454        unsafe { self.bits(variant.into()) }
455    }
456    #[doc = "Continuous, as soon as the receiver is enabled, and immediately after the end of transfer of the previous data."]
457    #[inline(always)]
458    pub fn continuous(self) -> &'a mut W {
459        self.variant(START_A::CONTINUOUS)
460    }
461    #[doc = "Transmit start"]
462    #[inline(always)]
463    pub fn transmit(self) -> &'a mut W {
464        self.variant(START_A::TRANSMIT)
465    }
466    #[doc = "Detection of a low level on RF signal"]
467    #[inline(always)]
468    pub fn rf_low(self) -> &'a mut W {
469        self.variant(START_A::RF_LOW)
470    }
471    #[doc = "Detection of a high level on RF signal"]
472    #[inline(always)]
473    pub fn rf_high(self) -> &'a mut W {
474        self.variant(START_A::RF_HIGH)
475    }
476    #[doc = "Detection of a falling edge on RF signal"]
477    #[inline(always)]
478    pub fn rf_falling(self) -> &'a mut W {
479        self.variant(START_A::RF_FALLING)
480    }
481    #[doc = "Detection of a rising edge on RF signal"]
482    #[inline(always)]
483    pub fn rf_rising(self) -> &'a mut W {
484        self.variant(START_A::RF_RISING)
485    }
486    #[doc = "Detection of any level change on RF signal"]
487    #[inline(always)]
488    pub fn rf_level(self) -> &'a mut W {
489        self.variant(START_A::RF_LEVEL)
490    }
491    #[doc = "Detection of any edge on RF signal"]
492    #[inline(always)]
493    pub fn rf_edge(self) -> &'a mut W {
494        self.variant(START_A::RF_EDGE)
495    }
496    #[doc = "Compare 0"]
497    #[inline(always)]
498    pub fn cmp_0(self) -> &'a mut W {
499        self.variant(START_A::CMP_0)
500    }
501    #[doc = r"Writes raw bits to the field"]
502    #[inline(always)]
503    pub unsafe fn bits(self, value: u8) -> &'a mut W {
504        self.w.bits = (self.w.bits & !(0x0f << 8)) | ((value as u32 & 0x0f) << 8);
505        self.w
506    }
507}
508#[doc = "Field `STOP` reader - Receive Stop Selection"]
509pub struct STOP_R(crate::FieldReader<bool, bool>);
510impl STOP_R {
511    #[inline(always)]
512    pub(crate) fn new(bits: bool) -> Self {
513        STOP_R(crate::FieldReader::new(bits))
514    }
515}
516impl core::ops::Deref for STOP_R {
517    type Target = crate::FieldReader<bool, bool>;
518    #[inline(always)]
519    fn deref(&self) -> &Self::Target {
520        &self.0
521    }
522}
523#[doc = "Field `STOP` writer - Receive Stop Selection"]
524pub struct STOP_W<'a> {
525    w: &'a mut W,
526}
527impl<'a> STOP_W<'a> {
528    #[doc = r"Sets the field bit"]
529    #[inline(always)]
530    pub fn set_bit(self) -> &'a mut W {
531        self.bit(true)
532    }
533    #[doc = r"Clears the field bit"]
534    #[inline(always)]
535    pub fn clear_bit(self) -> &'a mut W {
536        self.bit(false)
537    }
538    #[doc = r"Writes raw bits to the field"]
539    #[inline(always)]
540    pub fn bit(self, value: bool) -> &'a mut W {
541        self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12);
542        self.w
543    }
544}
545#[doc = "Field `STTDLY` reader - Receive Start Delay"]
546pub struct STTDLY_R(crate::FieldReader<u8, u8>);
547impl STTDLY_R {
548    #[inline(always)]
549    pub(crate) fn new(bits: u8) -> Self {
550        STTDLY_R(crate::FieldReader::new(bits))
551    }
552}
553impl core::ops::Deref for STTDLY_R {
554    type Target = crate::FieldReader<u8, u8>;
555    #[inline(always)]
556    fn deref(&self) -> &Self::Target {
557        &self.0
558    }
559}
560#[doc = "Field `STTDLY` writer - Receive Start Delay"]
561pub struct STTDLY_W<'a> {
562    w: &'a mut W,
563}
564impl<'a> STTDLY_W<'a> {
565    #[doc = r"Writes raw bits to the field"]
566    #[inline(always)]
567    pub unsafe fn bits(self, value: u8) -> &'a mut W {
568        self.w.bits = (self.w.bits & !(0xff << 16)) | ((value as u32 & 0xff) << 16);
569        self.w
570    }
571}
572#[doc = "Field `PERIOD` reader - Receive Period Divider Selection"]
573pub struct PERIOD_R(crate::FieldReader<u8, u8>);
574impl PERIOD_R {
575    #[inline(always)]
576    pub(crate) fn new(bits: u8) -> Self {
577        PERIOD_R(crate::FieldReader::new(bits))
578    }
579}
580impl core::ops::Deref for PERIOD_R {
581    type Target = crate::FieldReader<u8, u8>;
582    #[inline(always)]
583    fn deref(&self) -> &Self::Target {
584        &self.0
585    }
586}
587#[doc = "Field `PERIOD` writer - Receive Period Divider Selection"]
588pub struct PERIOD_W<'a> {
589    w: &'a mut W,
590}
591impl<'a> PERIOD_W<'a> {
592    #[doc = r"Writes raw bits to the field"]
593    #[inline(always)]
594    pub unsafe fn bits(self, value: u8) -> &'a mut W {
595        self.w.bits = (self.w.bits & !(0xff << 24)) | ((value as u32 & 0xff) << 24);
596        self.w
597    }
598}
599impl R {
600    #[doc = "Bits 0:1 - Receive Clock Selection"]
601    #[inline(always)]
602    pub fn cks(&self) -> CKS_R {
603        CKS_R::new((self.bits & 0x03) as u8)
604    }
605    #[doc = "Bits 2:4 - Receive Clock Output Mode Selection"]
606    #[inline(always)]
607    pub fn cko(&self) -> CKO_R {
608        CKO_R::new(((self.bits >> 2) & 0x07) as u8)
609    }
610    #[doc = "Bit 5 - Receive Clock Inversion"]
611    #[inline(always)]
612    pub fn cki(&self) -> CKI_R {
613        CKI_R::new(((self.bits >> 5) & 0x01) != 0)
614    }
615    #[doc = "Bits 6:7 - Receive Clock Gating Selection"]
616    #[inline(always)]
617    pub fn ckg(&self) -> CKG_R {
618        CKG_R::new(((self.bits >> 6) & 0x03) as u8)
619    }
620    #[doc = "Bits 8:11 - Receive Start Selection"]
621    #[inline(always)]
622    pub fn start(&self) -> START_R {
623        START_R::new(((self.bits >> 8) & 0x0f) as u8)
624    }
625    #[doc = "Bit 12 - Receive Stop Selection"]
626    #[inline(always)]
627    pub fn stop(&self) -> STOP_R {
628        STOP_R::new(((self.bits >> 12) & 0x01) != 0)
629    }
630    #[doc = "Bits 16:23 - Receive Start Delay"]
631    #[inline(always)]
632    pub fn sttdly(&self) -> STTDLY_R {
633        STTDLY_R::new(((self.bits >> 16) & 0xff) as u8)
634    }
635    #[doc = "Bits 24:31 - Receive Period Divider Selection"]
636    #[inline(always)]
637    pub fn period(&self) -> PERIOD_R {
638        PERIOD_R::new(((self.bits >> 24) & 0xff) as u8)
639    }
640}
641impl W {
642    #[doc = "Bits 0:1 - Receive Clock Selection"]
643    #[inline(always)]
644    pub fn cks(&mut self) -> CKS_W {
645        CKS_W { w: self }
646    }
647    #[doc = "Bits 2:4 - Receive Clock Output Mode Selection"]
648    #[inline(always)]
649    pub fn cko(&mut self) -> CKO_W {
650        CKO_W { w: self }
651    }
652    #[doc = "Bit 5 - Receive Clock Inversion"]
653    #[inline(always)]
654    pub fn cki(&mut self) -> CKI_W {
655        CKI_W { w: self }
656    }
657    #[doc = "Bits 6:7 - Receive Clock Gating Selection"]
658    #[inline(always)]
659    pub fn ckg(&mut self) -> CKG_W {
660        CKG_W { w: self }
661    }
662    #[doc = "Bits 8:11 - Receive Start Selection"]
663    #[inline(always)]
664    pub fn start(&mut self) -> START_W {
665        START_W { w: self }
666    }
667    #[doc = "Bit 12 - Receive Stop Selection"]
668    #[inline(always)]
669    pub fn stop(&mut self) -> STOP_W {
670        STOP_W { w: self }
671    }
672    #[doc = "Bits 16:23 - Receive Start Delay"]
673    #[inline(always)]
674    pub fn sttdly(&mut self) -> STTDLY_W {
675        STTDLY_W { w: self }
676    }
677    #[doc = "Bits 24:31 - Receive Period Divider Selection"]
678    #[inline(always)]
679    pub fn period(&mut self) -> PERIOD_W {
680        PERIOD_W { w: self }
681    }
682    #[doc = "Writes raw bits to the register."]
683    #[inline(always)]
684    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
685        self.0.bits(bits);
686        self
687    }
688}
689#[doc = "Receive Clock Mode Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ssc_rcmr](index.html) module"]
690pub struct SSC_RCMR_SPEC;
691impl crate::RegisterSpec for SSC_RCMR_SPEC {
692    type Ux = u32;
693}
694#[doc = "`read()` method returns [ssc_rcmr::R](R) reader structure"]
695impl crate::Readable for SSC_RCMR_SPEC {
696    type Reader = R;
697}
698#[doc = "`write(|w| ..)` method takes [ssc_rcmr::W](W) writer structure"]
699impl crate::Writable for SSC_RCMR_SPEC {
700    type Writer = W;
701}
702#[doc = "`reset()` method sets SSC_RCMR to value 0"]
703impl crate::Resettable for SSC_RCMR_SPEC {
704    #[inline(always)]
705    fn reset_value() -> Self::Ux {
706        0
707    }
708}
atsams70j21/ssc/ssc_rcmr.rs

atsams70j21/ssc/
ssc_rcmr.rs
