[−][src]Struct atsams70j20b::ssc::RegisterBlock

#[repr(C)]
pub struct RegisterBlock {
    pub ssc_cr: SSC_CR,
    pub ssc_cmr: SSC_CMR,
    pub ssc_rcmr: SSC_RCMR,
    pub ssc_rfmr: SSC_RFMR,
    pub ssc_tcmr: SSC_TCMR,
    pub ssc_tfmr: SSC_TFMR,
    pub ssc_rhr: SSC_RHR,
    pub ssc_thr: SSC_THR,
    pub ssc_rshr: SSC_RSHR,
    pub ssc_tshr: SSC_TSHR,
    pub ssc_rc0r: SSC_RC0R,
    pub ssc_rc1r: SSC_RC1R,
    pub ssc_sr: SSC_SR,
    pub ssc_ier: SSC_IER,
    pub ssc_idr: SSC_IDR,
    pub ssc_imr: SSC_IMR,
    pub ssc_wpmr: SSC_WPMR,
    pub ssc_wpsr: SSC_WPSR,
    // some fields omitted
}

Register block

Fields

ssc_cr: SSC_CR

0x00 - Control Register

ssc_cmr: SSC_CMR

0x04 - Clock Mode Register

ssc_rcmr: SSC_RCMR

0x10 - Receive Clock Mode Register

ssc_rfmr: SSC_RFMR

0x14 - Receive Frame Mode Register

ssc_tcmr: SSC_TCMR

0x18 - Transmit Clock Mode Register

ssc_tfmr: SSC_TFMR

0x1c - Transmit Frame Mode Register

ssc_rhr: SSC_RHR

0x20 - Receive Holding Register

ssc_thr: SSC_THR

0x24 - Transmit Holding Register

ssc_rshr: SSC_RSHR

0x30 - Receive Sync. Holding Register

ssc_tshr: SSC_TSHR

0x34 - Transmit Sync. Holding Register

ssc_rc0r: SSC_RC0R

0x38 - Receive Compare 0 Register

ssc_rc1r: SSC_RC1R

0x3c - Receive Compare 1 Register

ssc_sr: SSC_SR

0x40 - Status Register

ssc_ier: SSC_IER

0x44 - Interrupt Enable Register

ssc_idr: SSC_IDR

0x48 - Interrupt Disable Register

ssc_imr: SSC_IMR

0x4c - Interrupt Mask Register

ssc_wpmr: SSC_WPMR

0xe4 - Write Protection Mode Register

ssc_wpsr: SSC_WPSR

0xe8 - Write Protection Status Register

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