1#[doc = "Register `EVCTRL%s` reader"]
2pub struct R(crate::R<EVCTRL_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<EVCTRL_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<EVCTRL_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<EVCTRL_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `EVCTRL%s` writer"]
17pub struct W(crate::W<EVCTRL_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<EVCTRL_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<EVCTRL_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<EVCTRL_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `PID0` reader - Port Event Pin Identifier 0"]
38pub type PID0_R = crate::FieldReader<u8, u8>;
39#[doc = "Field `PID0` writer - Port Event Pin Identifier 0"]
40pub type PID0_W<'a, const O: u8> = crate::FieldWriter<'a, u32, EVCTRL_SPEC, u8, u8, 5, O>;
41#[doc = "Field `EVACT0` reader - Port Event Action 0"]
42pub type EVACT0_R = crate::FieldReader<u8, u8>;
43#[doc = "Field `EVACT0` writer - Port Event Action 0"]
44pub type EVACT0_W<'a, const O: u8> = crate::FieldWriter<'a, u32, EVCTRL_SPEC, u8, u8, 2, O>;
45#[doc = "Field `PORTEI0` reader - Port Event Enable Input 0"]
46pub type PORTEI0_R = crate::BitReader<bool>;
47#[doc = "Field `PORTEI0` writer - Port Event Enable Input 0"]
48pub type PORTEI0_W<'a, const O: u8> = crate::BitWriter<'a, u32, EVCTRL_SPEC, bool, O>;
49#[doc = "Field `PID1` reader - Port Event Pin Identifier 1"]
50pub type PID1_R = crate::FieldReader<u8, u8>;
51#[doc = "Field `PID1` writer - Port Event Pin Identifier 1"]
52pub type PID1_W<'a, const O: u8> = crate::FieldWriter<'a, u32, EVCTRL_SPEC, u8, u8, 5, O>;
53#[doc = "Field `EVACT1` reader - Port Event Action 1"]
54pub type EVACT1_R = crate::FieldReader<u8, u8>;
55#[doc = "Field `EVACT1` writer - Port Event Action 1"]
56pub type EVACT1_W<'a, const O: u8> = crate::FieldWriter<'a, u32, EVCTRL_SPEC, u8, u8, 2, O>;
57#[doc = "Field `PORTEI1` reader - Port Event Enable Input 1"]
58pub type PORTEI1_R = crate::BitReader<bool>;
59#[doc = "Field `PORTEI1` writer - Port Event Enable Input 1"]
60pub type PORTEI1_W<'a, const O: u8> = crate::BitWriter<'a, u32, EVCTRL_SPEC, bool, O>;
61#[doc = "Field `PID2` reader - Port Event Pin Identifier 2"]
62pub type PID2_R = crate::FieldReader<u8, u8>;
63#[doc = "Field `PID2` writer - Port Event Pin Identifier 2"]
64pub type PID2_W<'a, const O: u8> = crate::FieldWriter<'a, u32, EVCTRL_SPEC, u8, u8, 5, O>;
65#[doc = "Field `EVACT2` reader - Port Event Action 2"]
66pub type EVACT2_R = crate::FieldReader<u8, u8>;
67#[doc = "Field `EVACT2` writer - Port Event Action 2"]
68pub type EVACT2_W<'a, const O: u8> = crate::FieldWriter<'a, u32, EVCTRL_SPEC, u8, u8, 2, O>;
69#[doc = "Field `PORTEI2` reader - Port Event Enable Input 2"]
70pub type PORTEI2_R = crate::BitReader<bool>;
71#[doc = "Field `PORTEI2` writer - Port Event Enable Input 2"]
72pub type PORTEI2_W<'a, const O: u8> = crate::BitWriter<'a, u32, EVCTRL_SPEC, bool, O>;
73#[doc = "Field `PID3` reader - Port Event Pin Identifier 3"]
74pub type PID3_R = crate::FieldReader<u8, u8>;
75#[doc = "Field `PID3` writer - Port Event Pin Identifier 3"]
76pub type PID3_W<'a, const O: u8> = crate::FieldWriter<'a, u32, EVCTRL_SPEC, u8, u8, 5, O>;
77#[doc = "Field `EVACT3` reader - Port Event Action 3"]
78pub type EVACT3_R = crate::FieldReader<u8, u8>;
79#[doc = "Field `EVACT3` writer - Port Event Action 3"]
80pub type EVACT3_W<'a, const O: u8> = crate::FieldWriter<'a, u32, EVCTRL_SPEC, u8, u8, 2, O>;
81#[doc = "Field `PORTEI3` reader - Port Event Enable Input 3"]
82pub type PORTEI3_R = crate::BitReader<bool>;
83#[doc = "Field `PORTEI3` writer - Port Event Enable Input 3"]
84pub type PORTEI3_W<'a, const O: u8> = crate::BitWriter<'a, u32, EVCTRL_SPEC, bool, O>;
85impl R {
86 #[doc = "Bits 0:4 - Port Event Pin Identifier 0"]
87 #[inline(always)]
88 pub fn pid0(&self) -> PID0_R {
89 PID0_R::new((self.bits & 0x1f) as u8)
90 }
91 #[doc = "Bits 5:6 - Port Event Action 0"]
92 #[inline(always)]
93 pub fn evact0(&self) -> EVACT0_R {
94 EVACT0_R::new(((self.bits >> 5) & 3) as u8)
95 }
96 #[doc = "Bit 7 - Port Event Enable Input 0"]
97 #[inline(always)]
98 pub fn portei0(&self) -> PORTEI0_R {
99 PORTEI0_R::new(((self.bits >> 7) & 1) != 0)
100 }
101 #[doc = "Bits 8:12 - Port Event Pin Identifier 1"]
102 #[inline(always)]
103 pub fn pid1(&self) -> PID1_R {
104 PID1_R::new(((self.bits >> 8) & 0x1f) as u8)
105 }
106 #[doc = "Bits 13:14 - Port Event Action 1"]
107 #[inline(always)]
108 pub fn evact1(&self) -> EVACT1_R {
109 EVACT1_R::new(((self.bits >> 13) & 3) as u8)
110 }
111 #[doc = "Bit 15 - Port Event Enable Input 1"]
112 #[inline(always)]
113 pub fn portei1(&self) -> PORTEI1_R {
114 PORTEI1_R::new(((self.bits >> 15) & 1) != 0)
115 }
116 #[doc = "Bits 16:20 - Port Event Pin Identifier 2"]
117 #[inline(always)]
118 pub fn pid2(&self) -> PID2_R {
119 PID2_R::new(((self.bits >> 16) & 0x1f) as u8)
120 }
121 #[doc = "Bits 21:22 - Port Event Action 2"]
122 #[inline(always)]
123 pub fn evact2(&self) -> EVACT2_R {
124 EVACT2_R::new(((self.bits >> 21) & 3) as u8)
125 }
126 #[doc = "Bit 23 - Port Event Enable Input 2"]
127 #[inline(always)]
128 pub fn portei2(&self) -> PORTEI2_R {
129 PORTEI2_R::new(((self.bits >> 23) & 1) != 0)
130 }
131 #[doc = "Bits 24:28 - Port Event Pin Identifier 3"]
132 #[inline(always)]
133 pub fn pid3(&self) -> PID3_R {
134 PID3_R::new(((self.bits >> 24) & 0x1f) as u8)
135 }
136 #[doc = "Bits 29:30 - Port Event Action 3"]
137 #[inline(always)]
138 pub fn evact3(&self) -> EVACT3_R {
139 EVACT3_R::new(((self.bits >> 29) & 3) as u8)
140 }
141 #[doc = "Bit 31 - Port Event Enable Input 3"]
142 #[inline(always)]
143 pub fn portei3(&self) -> PORTEI3_R {
144 PORTEI3_R::new(((self.bits >> 31) & 1) != 0)
145 }
146}
147impl W {
148 #[doc = "Bits 0:4 - Port Event Pin Identifier 0"]
149 #[inline(always)]
150 #[must_use]
151 pub fn pid0(&mut self) -> PID0_W<0> {
152 PID0_W::new(self)
153 }
154 #[doc = "Bits 5:6 - Port Event Action 0"]
155 #[inline(always)]
156 #[must_use]
157 pub fn evact0(&mut self) -> EVACT0_W<5> {
158 EVACT0_W::new(self)
159 }
160 #[doc = "Bit 7 - Port Event Enable Input 0"]
161 #[inline(always)]
162 #[must_use]
163 pub fn portei0(&mut self) -> PORTEI0_W<7> {
164 PORTEI0_W::new(self)
165 }
166 #[doc = "Bits 8:12 - Port Event Pin Identifier 1"]
167 #[inline(always)]
168 #[must_use]
169 pub fn pid1(&mut self) -> PID1_W<8> {
170 PID1_W::new(self)
171 }
172 #[doc = "Bits 13:14 - Port Event Action 1"]
173 #[inline(always)]
174 #[must_use]
175 pub fn evact1(&mut self) -> EVACT1_W<13> {
176 EVACT1_W::new(self)
177 }
178 #[doc = "Bit 15 - Port Event Enable Input 1"]
179 #[inline(always)]
180 #[must_use]
181 pub fn portei1(&mut self) -> PORTEI1_W<15> {
182 PORTEI1_W::new(self)
183 }
184 #[doc = "Bits 16:20 - Port Event Pin Identifier 2"]
185 #[inline(always)]
186 #[must_use]
187 pub fn pid2(&mut self) -> PID2_W<16> {
188 PID2_W::new(self)
189 }
190 #[doc = "Bits 21:22 - Port Event Action 2"]
191 #[inline(always)]
192 #[must_use]
193 pub fn evact2(&mut self) -> EVACT2_W<21> {
194 EVACT2_W::new(self)
195 }
196 #[doc = "Bit 23 - Port Event Enable Input 2"]
197 #[inline(always)]
198 #[must_use]
199 pub fn portei2(&mut self) -> PORTEI2_W<23> {
200 PORTEI2_W::new(self)
201 }
202 #[doc = "Bits 24:28 - Port Event Pin Identifier 3"]
203 #[inline(always)]
204 #[must_use]
205 pub fn pid3(&mut self) -> PID3_W<24> {
206 PID3_W::new(self)
207 }
208 #[doc = "Bits 29:30 - Port Event Action 3"]
209 #[inline(always)]
210 #[must_use]
211 pub fn evact3(&mut self) -> EVACT3_W<29> {
212 EVACT3_W::new(self)
213 }
214 #[doc = "Bit 31 - Port Event Enable Input 3"]
215 #[inline(always)]
216 #[must_use]
217 pub fn portei3(&mut self) -> PORTEI3_W<31> {
218 PORTEI3_W::new(self)
219 }
220 #[doc = "Writes raw bits to the register."]
221 #[inline(always)]
222 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
223 self.0.bits(bits);
224 self
225 }
226}
227#[doc = "Event Input Control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [evctrl](index.html) module"]
228pub struct EVCTRL_SPEC;
229impl crate::RegisterSpec for EVCTRL_SPEC {
230 type Ux = u32;
231}
232#[doc = "`read()` method returns [evctrl::R](R) reader structure"]
233impl crate::Readable for EVCTRL_SPEC {
234 type Reader = R;
235}
236#[doc = "`write(|w| ..)` method takes [evctrl::W](W) writer structure"]
237impl crate::Writable for EVCTRL_SPEC {
238 type Writer = W;
239 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
240 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
241}
242#[doc = "`reset()` method sets EVCTRL%s to value 0"]
243impl crate::Resettable for EVCTRL_SPEC {
244 const RESET_VALUE: Self::Ux = 0;
245}