atsaml21j17bu/tcc0/
ctrla.rs

1#[doc = "Register `CTRLA` reader"]
2pub struct R(crate::R<CTRLA_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<CTRLA_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<CTRLA_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<CTRLA_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `CTRLA` writer"]
17pub struct W(crate::W<CTRLA_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<CTRLA_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<CTRLA_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<CTRLA_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `SWRST` reader - Software Reset"]
38pub type SWRST_R = crate::BitReader<bool>;
39#[doc = "Field `SWRST` writer - Software Reset"]
40pub type SWRST_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRLA_SPEC, bool, O>;
41#[doc = "Field `ENABLE` reader - Enable"]
42pub type ENABLE_R = crate::BitReader<bool>;
43#[doc = "Field `ENABLE` writer - Enable"]
44pub type ENABLE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRLA_SPEC, bool, O>;
45#[doc = "Field `RESOLUTION` reader - Enhanced Resolution"]
46pub type RESOLUTION_R = crate::FieldReader<u8, RESOLUTIONSELECT_A>;
47#[doc = "Enhanced Resolution\n\nValue on reset: 0"]
48#[derive(Clone, Copy, Debug, PartialEq, Eq)]
49#[repr(u8)]
50pub enum RESOLUTIONSELECT_A {
51    #[doc = "0: Dithering is disabled"]
52    NONE = 0,
53    #[doc = "1: Dithering is done every 16 PWM frames"]
54    DITH4 = 1,
55    #[doc = "2: Dithering is done every 32 PWM frames"]
56    DITH5 = 2,
57    #[doc = "3: Dithering is done every 64 PWM frames"]
58    DITH6 = 3,
59}
60impl From<RESOLUTIONSELECT_A> for u8 {
61    #[inline(always)]
62    fn from(variant: RESOLUTIONSELECT_A) -> Self {
63        variant as _
64    }
65}
66impl RESOLUTION_R {
67    #[doc = "Get enumerated values variant"]
68    #[inline(always)]
69    pub fn variant(&self) -> RESOLUTIONSELECT_A {
70        match self.bits {
71            0 => RESOLUTIONSELECT_A::NONE,
72            1 => RESOLUTIONSELECT_A::DITH4,
73            2 => RESOLUTIONSELECT_A::DITH5,
74            3 => RESOLUTIONSELECT_A::DITH6,
75            _ => unreachable!(),
76        }
77    }
78    #[doc = "Checks if the value of the field is `NONE`"]
79    #[inline(always)]
80    pub fn is_none(&self) -> bool {
81        *self == RESOLUTIONSELECT_A::NONE
82    }
83    #[doc = "Checks if the value of the field is `DITH4`"]
84    #[inline(always)]
85    pub fn is_dith4(&self) -> bool {
86        *self == RESOLUTIONSELECT_A::DITH4
87    }
88    #[doc = "Checks if the value of the field is `DITH5`"]
89    #[inline(always)]
90    pub fn is_dith5(&self) -> bool {
91        *self == RESOLUTIONSELECT_A::DITH5
92    }
93    #[doc = "Checks if the value of the field is `DITH6`"]
94    #[inline(always)]
95    pub fn is_dith6(&self) -> bool {
96        *self == RESOLUTIONSELECT_A::DITH6
97    }
98}
99#[doc = "Field `RESOLUTION` writer - Enhanced Resolution"]
100pub type RESOLUTION_W<'a, const O: u8> =
101    crate::FieldWriterSafe<'a, u32, CTRLA_SPEC, u8, RESOLUTIONSELECT_A, 2, O>;
102impl<'a, const O: u8> RESOLUTION_W<'a, O> {
103    #[doc = "Dithering is disabled"]
104    #[inline(always)]
105    pub fn none(self) -> &'a mut W {
106        self.variant(RESOLUTIONSELECT_A::NONE)
107    }
108    #[doc = "Dithering is done every 16 PWM frames"]
109    #[inline(always)]
110    pub fn dith4(self) -> &'a mut W {
111        self.variant(RESOLUTIONSELECT_A::DITH4)
112    }
113    #[doc = "Dithering is done every 32 PWM frames"]
114    #[inline(always)]
115    pub fn dith5(self) -> &'a mut W {
116        self.variant(RESOLUTIONSELECT_A::DITH5)
117    }
118    #[doc = "Dithering is done every 64 PWM frames"]
119    #[inline(always)]
120    pub fn dith6(self) -> &'a mut W {
121        self.variant(RESOLUTIONSELECT_A::DITH6)
122    }
123}
124#[doc = "Field `PRESCALER` reader - Prescaler"]
125pub type PRESCALER_R = crate::FieldReader<u8, PRESCALERSELECT_A>;
126#[doc = "Prescaler\n\nValue on reset: 0"]
127#[derive(Clone, Copy, Debug, PartialEq, Eq)]
128#[repr(u8)]
129pub enum PRESCALERSELECT_A {
130    #[doc = "0: No division"]
131    DIV1 = 0,
132    #[doc = "1: Divide by 2"]
133    DIV2 = 1,
134    #[doc = "2: Divide by 4"]
135    DIV4 = 2,
136    #[doc = "3: Divide by 8"]
137    DIV8 = 3,
138    #[doc = "4: Divide by 16"]
139    DIV16 = 4,
140    #[doc = "5: Divide by 64"]
141    DIV64 = 5,
142    #[doc = "6: Divide by 256"]
143    DIV256 = 6,
144    #[doc = "7: Divide by 1024"]
145    DIV1024 = 7,
146}
147impl From<PRESCALERSELECT_A> for u8 {
148    #[inline(always)]
149    fn from(variant: PRESCALERSELECT_A) -> Self {
150        variant as _
151    }
152}
153impl PRESCALER_R {
154    #[doc = "Get enumerated values variant"]
155    #[inline(always)]
156    pub fn variant(&self) -> PRESCALERSELECT_A {
157        match self.bits {
158            0 => PRESCALERSELECT_A::DIV1,
159            1 => PRESCALERSELECT_A::DIV2,
160            2 => PRESCALERSELECT_A::DIV4,
161            3 => PRESCALERSELECT_A::DIV8,
162            4 => PRESCALERSELECT_A::DIV16,
163            5 => PRESCALERSELECT_A::DIV64,
164            6 => PRESCALERSELECT_A::DIV256,
165            7 => PRESCALERSELECT_A::DIV1024,
166            _ => unreachable!(),
167        }
168    }
169    #[doc = "Checks if the value of the field is `DIV1`"]
170    #[inline(always)]
171    pub fn is_div1(&self) -> bool {
172        *self == PRESCALERSELECT_A::DIV1
173    }
174    #[doc = "Checks if the value of the field is `DIV2`"]
175    #[inline(always)]
176    pub fn is_div2(&self) -> bool {
177        *self == PRESCALERSELECT_A::DIV2
178    }
179    #[doc = "Checks if the value of the field is `DIV4`"]
180    #[inline(always)]
181    pub fn is_div4(&self) -> bool {
182        *self == PRESCALERSELECT_A::DIV4
183    }
184    #[doc = "Checks if the value of the field is `DIV8`"]
185    #[inline(always)]
186    pub fn is_div8(&self) -> bool {
187        *self == PRESCALERSELECT_A::DIV8
188    }
189    #[doc = "Checks if the value of the field is `DIV16`"]
190    #[inline(always)]
191    pub fn is_div16(&self) -> bool {
192        *self == PRESCALERSELECT_A::DIV16
193    }
194    #[doc = "Checks if the value of the field is `DIV64`"]
195    #[inline(always)]
196    pub fn is_div64(&self) -> bool {
197        *self == PRESCALERSELECT_A::DIV64
198    }
199    #[doc = "Checks if the value of the field is `DIV256`"]
200    #[inline(always)]
201    pub fn is_div256(&self) -> bool {
202        *self == PRESCALERSELECT_A::DIV256
203    }
204    #[doc = "Checks if the value of the field is `DIV1024`"]
205    #[inline(always)]
206    pub fn is_div1024(&self) -> bool {
207        *self == PRESCALERSELECT_A::DIV1024
208    }
209}
210#[doc = "Field `PRESCALER` writer - Prescaler"]
211pub type PRESCALER_W<'a, const O: u8> =
212    crate::FieldWriterSafe<'a, u32, CTRLA_SPEC, u8, PRESCALERSELECT_A, 3, O>;
213impl<'a, const O: u8> PRESCALER_W<'a, O> {
214    #[doc = "No division"]
215    #[inline(always)]
216    pub fn div1(self) -> &'a mut W {
217        self.variant(PRESCALERSELECT_A::DIV1)
218    }
219    #[doc = "Divide by 2"]
220    #[inline(always)]
221    pub fn div2(self) -> &'a mut W {
222        self.variant(PRESCALERSELECT_A::DIV2)
223    }
224    #[doc = "Divide by 4"]
225    #[inline(always)]
226    pub fn div4(self) -> &'a mut W {
227        self.variant(PRESCALERSELECT_A::DIV4)
228    }
229    #[doc = "Divide by 8"]
230    #[inline(always)]
231    pub fn div8(self) -> &'a mut W {
232        self.variant(PRESCALERSELECT_A::DIV8)
233    }
234    #[doc = "Divide by 16"]
235    #[inline(always)]
236    pub fn div16(self) -> &'a mut W {
237        self.variant(PRESCALERSELECT_A::DIV16)
238    }
239    #[doc = "Divide by 64"]
240    #[inline(always)]
241    pub fn div64(self) -> &'a mut W {
242        self.variant(PRESCALERSELECT_A::DIV64)
243    }
244    #[doc = "Divide by 256"]
245    #[inline(always)]
246    pub fn div256(self) -> &'a mut W {
247        self.variant(PRESCALERSELECT_A::DIV256)
248    }
249    #[doc = "Divide by 1024"]
250    #[inline(always)]
251    pub fn div1024(self) -> &'a mut W {
252        self.variant(PRESCALERSELECT_A::DIV1024)
253    }
254}
255#[doc = "Field `RUNSTDBY` reader - Run in Standby"]
256pub type RUNSTDBY_R = crate::BitReader<bool>;
257#[doc = "Field `RUNSTDBY` writer - Run in Standby"]
258pub type RUNSTDBY_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRLA_SPEC, bool, O>;
259#[doc = "Field `PRESCSYNC` reader - Prescaler and Counter Synchronization Selection"]
260pub type PRESCSYNC_R = crate::FieldReader<u8, PRESCSYNCSELECT_A>;
261#[doc = "Prescaler and Counter Synchronization Selection\n\nValue on reset: 0"]
262#[derive(Clone, Copy, Debug, PartialEq, Eq)]
263#[repr(u8)]
264pub enum PRESCSYNCSELECT_A {
265    #[doc = "0: Reload or reset counter on next GCLK"]
266    GCLK = 0,
267    #[doc = "1: Reload or reset counter on next prescaler clock"]
268    PRESC = 1,
269    #[doc = "2: Reload or reset counter on next GCLK and reset prescaler counter"]
270    RESYNC = 2,
271}
272impl From<PRESCSYNCSELECT_A> for u8 {
273    #[inline(always)]
274    fn from(variant: PRESCSYNCSELECT_A) -> Self {
275        variant as _
276    }
277}
278impl PRESCSYNC_R {
279    #[doc = "Get enumerated values variant"]
280    #[inline(always)]
281    pub fn variant(&self) -> Option<PRESCSYNCSELECT_A> {
282        match self.bits {
283            0 => Some(PRESCSYNCSELECT_A::GCLK),
284            1 => Some(PRESCSYNCSELECT_A::PRESC),
285            2 => Some(PRESCSYNCSELECT_A::RESYNC),
286            _ => None,
287        }
288    }
289    #[doc = "Checks if the value of the field is `GCLK`"]
290    #[inline(always)]
291    pub fn is_gclk(&self) -> bool {
292        *self == PRESCSYNCSELECT_A::GCLK
293    }
294    #[doc = "Checks if the value of the field is `PRESC`"]
295    #[inline(always)]
296    pub fn is_presc(&self) -> bool {
297        *self == PRESCSYNCSELECT_A::PRESC
298    }
299    #[doc = "Checks if the value of the field is `RESYNC`"]
300    #[inline(always)]
301    pub fn is_resync(&self) -> bool {
302        *self == PRESCSYNCSELECT_A::RESYNC
303    }
304}
305#[doc = "Field `PRESCSYNC` writer - Prescaler and Counter Synchronization Selection"]
306pub type PRESCSYNC_W<'a, const O: u8> =
307    crate::FieldWriter<'a, u32, CTRLA_SPEC, u8, PRESCSYNCSELECT_A, 2, O>;
308impl<'a, const O: u8> PRESCSYNC_W<'a, O> {
309    #[doc = "Reload or reset counter on next GCLK"]
310    #[inline(always)]
311    pub fn gclk(self) -> &'a mut W {
312        self.variant(PRESCSYNCSELECT_A::GCLK)
313    }
314    #[doc = "Reload or reset counter on next prescaler clock"]
315    #[inline(always)]
316    pub fn presc(self) -> &'a mut W {
317        self.variant(PRESCSYNCSELECT_A::PRESC)
318    }
319    #[doc = "Reload or reset counter on next GCLK and reset prescaler counter"]
320    #[inline(always)]
321    pub fn resync(self) -> &'a mut W {
322        self.variant(PRESCSYNCSELECT_A::RESYNC)
323    }
324}
325#[doc = "Field `ALOCK` reader - Auto Lock"]
326pub type ALOCK_R = crate::BitReader<bool>;
327#[doc = "Field `ALOCK` writer - Auto Lock"]
328pub type ALOCK_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRLA_SPEC, bool, O>;
329#[doc = "Field `MSYNC` reader - Master Synchronization (only for TCC Slave Instance)"]
330pub type MSYNC_R = crate::BitReader<bool>;
331#[doc = "Field `MSYNC` writer - Master Synchronization (only for TCC Slave Instance)"]
332pub type MSYNC_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRLA_SPEC, bool, O>;
333#[doc = "Field `DMAOS` reader - DMA One-shot Trigger Mode"]
334pub type DMAOS_R = crate::BitReader<bool>;
335#[doc = "Field `DMAOS` writer - DMA One-shot Trigger Mode"]
336pub type DMAOS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRLA_SPEC, bool, O>;
337#[doc = "Field `CPTEN0` reader - Capture Channel 0 Enable"]
338pub type CPTEN0_R = crate::BitReader<bool>;
339#[doc = "Field `CPTEN0` writer - Capture Channel 0 Enable"]
340pub type CPTEN0_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRLA_SPEC, bool, O>;
341#[doc = "Field `CPTEN1` reader - Capture Channel 1 Enable"]
342pub type CPTEN1_R = crate::BitReader<bool>;
343#[doc = "Field `CPTEN1` writer - Capture Channel 1 Enable"]
344pub type CPTEN1_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRLA_SPEC, bool, O>;
345#[doc = "Field `CPTEN2` reader - Capture Channel 2 Enable"]
346pub type CPTEN2_R = crate::BitReader<bool>;
347#[doc = "Field `CPTEN2` writer - Capture Channel 2 Enable"]
348pub type CPTEN2_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRLA_SPEC, bool, O>;
349#[doc = "Field `CPTEN3` reader - Capture Channel 3 Enable"]
350pub type CPTEN3_R = crate::BitReader<bool>;
351#[doc = "Field `CPTEN3` writer - Capture Channel 3 Enable"]
352pub type CPTEN3_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRLA_SPEC, bool, O>;
353impl R {
354    #[doc = "Bit 0 - Software Reset"]
355    #[inline(always)]
356    pub fn swrst(&self) -> SWRST_R {
357        SWRST_R::new((self.bits & 1) != 0)
358    }
359    #[doc = "Bit 1 - Enable"]
360    #[inline(always)]
361    pub fn enable(&self) -> ENABLE_R {
362        ENABLE_R::new(((self.bits >> 1) & 1) != 0)
363    }
364    #[doc = "Bits 5:6 - Enhanced Resolution"]
365    #[inline(always)]
366    pub fn resolution(&self) -> RESOLUTION_R {
367        RESOLUTION_R::new(((self.bits >> 5) & 3) as u8)
368    }
369    #[doc = "Bits 8:10 - Prescaler"]
370    #[inline(always)]
371    pub fn prescaler(&self) -> PRESCALER_R {
372        PRESCALER_R::new(((self.bits >> 8) & 7) as u8)
373    }
374    #[doc = "Bit 11 - Run in Standby"]
375    #[inline(always)]
376    pub fn runstdby(&self) -> RUNSTDBY_R {
377        RUNSTDBY_R::new(((self.bits >> 11) & 1) != 0)
378    }
379    #[doc = "Bits 12:13 - Prescaler and Counter Synchronization Selection"]
380    #[inline(always)]
381    pub fn prescsync(&self) -> PRESCSYNC_R {
382        PRESCSYNC_R::new(((self.bits >> 12) & 3) as u8)
383    }
384    #[doc = "Bit 14 - Auto Lock"]
385    #[inline(always)]
386    pub fn alock(&self) -> ALOCK_R {
387        ALOCK_R::new(((self.bits >> 14) & 1) != 0)
388    }
389    #[doc = "Bit 15 - Master Synchronization (only for TCC Slave Instance)"]
390    #[inline(always)]
391    pub fn msync(&self) -> MSYNC_R {
392        MSYNC_R::new(((self.bits >> 15) & 1) != 0)
393    }
394    #[doc = "Bit 23 - DMA One-shot Trigger Mode"]
395    #[inline(always)]
396    pub fn dmaos(&self) -> DMAOS_R {
397        DMAOS_R::new(((self.bits >> 23) & 1) != 0)
398    }
399    #[doc = "Bit 24 - Capture Channel 0 Enable"]
400    #[inline(always)]
401    pub fn cpten0(&self) -> CPTEN0_R {
402        CPTEN0_R::new(((self.bits >> 24) & 1) != 0)
403    }
404    #[doc = "Bit 25 - Capture Channel 1 Enable"]
405    #[inline(always)]
406    pub fn cpten1(&self) -> CPTEN1_R {
407        CPTEN1_R::new(((self.bits >> 25) & 1) != 0)
408    }
409    #[doc = "Bit 26 - Capture Channel 2 Enable"]
410    #[inline(always)]
411    pub fn cpten2(&self) -> CPTEN2_R {
412        CPTEN2_R::new(((self.bits >> 26) & 1) != 0)
413    }
414    #[doc = "Bit 27 - Capture Channel 3 Enable"]
415    #[inline(always)]
416    pub fn cpten3(&self) -> CPTEN3_R {
417        CPTEN3_R::new(((self.bits >> 27) & 1) != 0)
418    }
419}
420impl W {
421    #[doc = "Bit 0 - Software Reset"]
422    #[inline(always)]
423    #[must_use]
424    pub fn swrst(&mut self) -> SWRST_W<0> {
425        SWRST_W::new(self)
426    }
427    #[doc = "Bit 1 - Enable"]
428    #[inline(always)]
429    #[must_use]
430    pub fn enable(&mut self) -> ENABLE_W<1> {
431        ENABLE_W::new(self)
432    }
433    #[doc = "Bits 5:6 - Enhanced Resolution"]
434    #[inline(always)]
435    #[must_use]
436    pub fn resolution(&mut self) -> RESOLUTION_W<5> {
437        RESOLUTION_W::new(self)
438    }
439    #[doc = "Bits 8:10 - Prescaler"]
440    #[inline(always)]
441    #[must_use]
442    pub fn prescaler(&mut self) -> PRESCALER_W<8> {
443        PRESCALER_W::new(self)
444    }
445    #[doc = "Bit 11 - Run in Standby"]
446    #[inline(always)]
447    #[must_use]
448    pub fn runstdby(&mut self) -> RUNSTDBY_W<11> {
449        RUNSTDBY_W::new(self)
450    }
451    #[doc = "Bits 12:13 - Prescaler and Counter Synchronization Selection"]
452    #[inline(always)]
453    #[must_use]
454    pub fn prescsync(&mut self) -> PRESCSYNC_W<12> {
455        PRESCSYNC_W::new(self)
456    }
457    #[doc = "Bit 14 - Auto Lock"]
458    #[inline(always)]
459    #[must_use]
460    pub fn alock(&mut self) -> ALOCK_W<14> {
461        ALOCK_W::new(self)
462    }
463    #[doc = "Bit 15 - Master Synchronization (only for TCC Slave Instance)"]
464    #[inline(always)]
465    #[must_use]
466    pub fn msync(&mut self) -> MSYNC_W<15> {
467        MSYNC_W::new(self)
468    }
469    #[doc = "Bit 23 - DMA One-shot Trigger Mode"]
470    #[inline(always)]
471    #[must_use]
472    pub fn dmaos(&mut self) -> DMAOS_W<23> {
473        DMAOS_W::new(self)
474    }
475    #[doc = "Bit 24 - Capture Channel 0 Enable"]
476    #[inline(always)]
477    #[must_use]
478    pub fn cpten0(&mut self) -> CPTEN0_W<24> {
479        CPTEN0_W::new(self)
480    }
481    #[doc = "Bit 25 - Capture Channel 1 Enable"]
482    #[inline(always)]
483    #[must_use]
484    pub fn cpten1(&mut self) -> CPTEN1_W<25> {
485        CPTEN1_W::new(self)
486    }
487    #[doc = "Bit 26 - Capture Channel 2 Enable"]
488    #[inline(always)]
489    #[must_use]
490    pub fn cpten2(&mut self) -> CPTEN2_W<26> {
491        CPTEN2_W::new(self)
492    }
493    #[doc = "Bit 27 - Capture Channel 3 Enable"]
494    #[inline(always)]
495    #[must_use]
496    pub fn cpten3(&mut self) -> CPTEN3_W<27> {
497        CPTEN3_W::new(self)
498    }
499    #[doc = "Writes raw bits to the register."]
500    #[inline(always)]
501    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
502        self.0.bits(bits);
503        self
504    }
505}
506#[doc = "Control A\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrla](index.html) module"]
507pub struct CTRLA_SPEC;
508impl crate::RegisterSpec for CTRLA_SPEC {
509    type Ux = u32;
510}
511#[doc = "`read()` method returns [ctrla::R](R) reader structure"]
512impl crate::Readable for CTRLA_SPEC {
513    type Reader = R;
514}
515#[doc = "`write(|w| ..)` method takes [ctrla::W](W) writer structure"]
516impl crate::Writable for CTRLA_SPEC {
517    type Writer = W;
518    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
519    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
520}
521#[doc = "`reset()` method sets CTRLA to value 0"]
522impl crate::Resettable for CTRLA_SPEC {
523    const RESET_VALUE: Self::Ux = 0;
524}
atsaml21j17bu/tcc0/ctrla.rs

atsaml21j17bu/tcc0/
ctrla.rs
