atsaml21j17bu/oscctrl/
osc16mctrl.rs

1#[doc = "Register `OSC16MCTRL` reader"]
2pub struct R(crate::R<OSC16MCTRL_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<OSC16MCTRL_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<OSC16MCTRL_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<OSC16MCTRL_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `OSC16MCTRL` writer"]
17pub struct W(crate::W<OSC16MCTRL_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<OSC16MCTRL_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<OSC16MCTRL_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<OSC16MCTRL_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `ENABLE` reader - Oscillator Enable"]
38pub type ENABLE_R = crate::BitReader<bool>;
39#[doc = "Field `ENABLE` writer - Oscillator Enable"]
40pub type ENABLE_W<'a, const O: u8> = crate::BitWriter<'a, u8, OSC16MCTRL_SPEC, bool, O>;
41#[doc = "Field `FSEL` reader - Oscillator Frequency Select"]
42pub type FSEL_R = crate::FieldReader<u8, FSELSELECT_A>;
43#[doc = "Oscillator Frequency Select\n\nValue on reset: 0"]
44#[derive(Clone, Copy, Debug, PartialEq, Eq)]
45#[repr(u8)]
46pub enum FSELSELECT_A {
47    #[doc = "0: 4MHz"]
48    _4 = 0,
49    #[doc = "1: 8MHz"]
50    _8 = 1,
51    #[doc = "2: 12MHz"]
52    _12 = 2,
53    #[doc = "3: 16MHz"]
54    _16 = 3,
55}
56impl From<FSELSELECT_A> for u8 {
57    #[inline(always)]
58    fn from(variant: FSELSELECT_A) -> Self {
59        variant as _
60    }
61}
62impl FSEL_R {
63    #[doc = "Get enumerated values variant"]
64    #[inline(always)]
65    pub fn variant(&self) -> FSELSELECT_A {
66        match self.bits {
67            0 => FSELSELECT_A::_4,
68            1 => FSELSELECT_A::_8,
69            2 => FSELSELECT_A::_12,
70            3 => FSELSELECT_A::_16,
71            _ => unreachable!(),
72        }
73    }
74    #[doc = "Checks if the value of the field is `_4`"]
75    #[inline(always)]
76    pub fn is_4(&self) -> bool {
77        *self == FSELSELECT_A::_4
78    }
79    #[doc = "Checks if the value of the field is `_8`"]
80    #[inline(always)]
81    pub fn is_8(&self) -> bool {
82        *self == FSELSELECT_A::_8
83    }
84    #[doc = "Checks if the value of the field is `_12`"]
85    #[inline(always)]
86    pub fn is_12(&self) -> bool {
87        *self == FSELSELECT_A::_12
88    }
89    #[doc = "Checks if the value of the field is `_16`"]
90    #[inline(always)]
91    pub fn is_16(&self) -> bool {
92        *self == FSELSELECT_A::_16
93    }
94}
95#[doc = "Field `FSEL` writer - Oscillator Frequency Select"]
96pub type FSEL_W<'a, const O: u8> =
97    crate::FieldWriterSafe<'a, u8, OSC16MCTRL_SPEC, u8, FSELSELECT_A, 2, O>;
98impl<'a, const O: u8> FSEL_W<'a, O> {
99    #[doc = "4MHz"]
100    #[inline(always)]
101    pub fn _4(self) -> &'a mut W {
102        self.variant(FSELSELECT_A::_4)
103    }
104    #[doc = "8MHz"]
105    #[inline(always)]
106    pub fn _8(self) -> &'a mut W {
107        self.variant(FSELSELECT_A::_8)
108    }
109    #[doc = "12MHz"]
110    #[inline(always)]
111    pub fn _12(self) -> &'a mut W {
112        self.variant(FSELSELECT_A::_12)
113    }
114    #[doc = "16MHz"]
115    #[inline(always)]
116    pub fn _16(self) -> &'a mut W {
117        self.variant(FSELSELECT_A::_16)
118    }
119}
120#[doc = "Field `RUNSTDBY` reader - Run in Standby"]
121pub type RUNSTDBY_R = crate::BitReader<bool>;
122#[doc = "Field `RUNSTDBY` writer - Run in Standby"]
123pub type RUNSTDBY_W<'a, const O: u8> = crate::BitWriter<'a, u8, OSC16MCTRL_SPEC, bool, O>;
124#[doc = "Field `ONDEMAND` reader - On Demand Control"]
125pub type ONDEMAND_R = crate::BitReader<bool>;
126#[doc = "Field `ONDEMAND` writer - On Demand Control"]
127pub type ONDEMAND_W<'a, const O: u8> = crate::BitWriter<'a, u8, OSC16MCTRL_SPEC, bool, O>;
128impl R {
129    #[doc = "Bit 1 - Oscillator Enable"]
130    #[inline(always)]
131    pub fn enable(&self) -> ENABLE_R {
132        ENABLE_R::new(((self.bits >> 1) & 1) != 0)
133    }
134    #[doc = "Bits 2:3 - Oscillator Frequency Select"]
135    #[inline(always)]
136    pub fn fsel(&self) -> FSEL_R {
137        FSEL_R::new((self.bits >> 2) & 3)
138    }
139    #[doc = "Bit 6 - Run in Standby"]
140    #[inline(always)]
141    pub fn runstdby(&self) -> RUNSTDBY_R {
142        RUNSTDBY_R::new(((self.bits >> 6) & 1) != 0)
143    }
144    #[doc = "Bit 7 - On Demand Control"]
145    #[inline(always)]
146    pub fn ondemand(&self) -> ONDEMAND_R {
147        ONDEMAND_R::new(((self.bits >> 7) & 1) != 0)
148    }
149}
150impl W {
151    #[doc = "Bit 1 - Oscillator Enable"]
152    #[inline(always)]
153    #[must_use]
154    pub fn enable(&mut self) -> ENABLE_W<1> {
155        ENABLE_W::new(self)
156    }
157    #[doc = "Bits 2:3 - Oscillator Frequency Select"]
158    #[inline(always)]
159    #[must_use]
160    pub fn fsel(&mut self) -> FSEL_W<2> {
161        FSEL_W::new(self)
162    }
163    #[doc = "Bit 6 - Run in Standby"]
164    #[inline(always)]
165    #[must_use]
166    pub fn runstdby(&mut self) -> RUNSTDBY_W<6> {
167        RUNSTDBY_W::new(self)
168    }
169    #[doc = "Bit 7 - On Demand Control"]
170    #[inline(always)]
171    #[must_use]
172    pub fn ondemand(&mut self) -> ONDEMAND_W<7> {
173        ONDEMAND_W::new(self)
174    }
175    #[doc = "Writes raw bits to the register."]
176    #[inline(always)]
177    pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
178        self.0.bits(bits);
179        self
180    }
181}
182#[doc = "16MHz Internal Oscillator (OSC16M) Control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [osc16mctrl](index.html) module"]
183pub struct OSC16MCTRL_SPEC;
184impl crate::RegisterSpec for OSC16MCTRL_SPEC {
185    type Ux = u8;
186}
187#[doc = "`read()` method returns [osc16mctrl::R](R) reader structure"]
188impl crate::Readable for OSC16MCTRL_SPEC {
189    type Reader = R;
190}
191#[doc = "`write(|w| ..)` method takes [osc16mctrl::W](W) writer structure"]
192impl crate::Writable for OSC16MCTRL_SPEC {
193    type Writer = W;
194    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
195    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
196}
197#[doc = "`reset()` method sets OSC16MCTRL to value 0x82"]
198impl crate::Resettable for OSC16MCTRL_SPEC {
199    const RESET_VALUE: Self::Ux = 0x82;
200}
atsaml21j17bu/oscctrl/osc16mctrl.rs

atsaml21j17bu/oscctrl/
osc16mctrl.rs
