atsaml21g18b/oscctrl/
dpllctrlb.rs1#[doc = "Register `DPLLCTRLB` reader"]
2pub struct R(crate::R<DPLLCTRLB_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<DPLLCTRLB_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<DPLLCTRLB_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<DPLLCTRLB_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `DPLLCTRLB` writer"]
17pub struct W(crate::W<DPLLCTRLB_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<DPLLCTRLB_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<DPLLCTRLB_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<DPLLCTRLB_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `FILTER` reader - Proportional Integral Filter Selection"]
38pub type FILTER_R = crate::FieldReader<u8, u8>;
39#[doc = "Field `FILTER` writer - Proportional Integral Filter Selection"]
40pub type FILTER_W<'a, const O: u8> = crate::FieldWriter<'a, u32, DPLLCTRLB_SPEC, u8, u8, 2, O>;
41#[doc = "Field `LPEN` reader - Low-Power Enable"]
42pub type LPEN_R = crate::BitReader<bool>;
43#[doc = "Field `LPEN` writer - Low-Power Enable"]
44pub type LPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DPLLCTRLB_SPEC, bool, O>;
45#[doc = "Field `WUF` reader - Wake Up Fast"]
46pub type WUF_R = crate::BitReader<bool>;
47#[doc = "Field `WUF` writer - Wake Up Fast"]
48pub type WUF_W<'a, const O: u8> = crate::BitWriter<'a, u32, DPLLCTRLB_SPEC, bool, O>;
49#[doc = "Field `REFCLK` reader - Reference Clock Selection"]
50pub type REFCLK_R = crate::FieldReader<u8, u8>;
51#[doc = "Field `REFCLK` writer - Reference Clock Selection"]
52pub type REFCLK_W<'a, const O: u8> = crate::FieldWriter<'a, u32, DPLLCTRLB_SPEC, u8, u8, 2, O>;
53#[doc = "Field `LTIME` reader - Lock Time"]
54pub type LTIME_R = crate::FieldReader<u8, u8>;
55#[doc = "Field `LTIME` writer - Lock Time"]
56pub type LTIME_W<'a, const O: u8> = crate::FieldWriter<'a, u32, DPLLCTRLB_SPEC, u8, u8, 3, O>;
57#[doc = "Field `LBYPASS` reader - Lock Bypass"]
58pub type LBYPASS_R = crate::BitReader<bool>;
59#[doc = "Field `LBYPASS` writer - Lock Bypass"]
60pub type LBYPASS_W<'a, const O: u8> = crate::BitWriter<'a, u32, DPLLCTRLB_SPEC, bool, O>;
61#[doc = "Field `DIV` reader - Clock Divider"]
62pub type DIV_R = crate::FieldReader<u16, u16>;
63#[doc = "Field `DIV` writer - Clock Divider"]
64pub type DIV_W<'a, const O: u8> = crate::FieldWriter<'a, u32, DPLLCTRLB_SPEC, u16, u16, 11, O>;
65impl R {
66 #[doc = "Bits 0:1 - Proportional Integral Filter Selection"]
67 #[inline(always)]
68 pub fn filter(&self) -> FILTER_R {
69 FILTER_R::new((self.bits & 3) as u8)
70 }
71 #[doc = "Bit 2 - Low-Power Enable"]
72 #[inline(always)]
73 pub fn lpen(&self) -> LPEN_R {
74 LPEN_R::new(((self.bits >> 2) & 1) != 0)
75 }
76 #[doc = "Bit 3 - Wake Up Fast"]
77 #[inline(always)]
78 pub fn wuf(&self) -> WUF_R {
79 WUF_R::new(((self.bits >> 3) & 1) != 0)
80 }
81 #[doc = "Bits 4:5 - Reference Clock Selection"]
82 #[inline(always)]
83 pub fn refclk(&self) -> REFCLK_R {
84 REFCLK_R::new(((self.bits >> 4) & 3) as u8)
85 }
86 #[doc = "Bits 8:10 - Lock Time"]
87 #[inline(always)]
88 pub fn ltime(&self) -> LTIME_R {
89 LTIME_R::new(((self.bits >> 8) & 7) as u8)
90 }
91 #[doc = "Bit 12 - Lock Bypass"]
92 #[inline(always)]
93 pub fn lbypass(&self) -> LBYPASS_R {
94 LBYPASS_R::new(((self.bits >> 12) & 1) != 0)
95 }
96 #[doc = "Bits 16:26 - Clock Divider"]
97 #[inline(always)]
98 pub fn div(&self) -> DIV_R {
99 DIV_R::new(((self.bits >> 16) & 0x07ff) as u16)
100 }
101}
102impl W {
103 #[doc = "Bits 0:1 - Proportional Integral Filter Selection"]
104 #[inline(always)]
105 #[must_use]
106 pub fn filter(&mut self) -> FILTER_W<0> {
107 FILTER_W::new(self)
108 }
109 #[doc = "Bit 2 - Low-Power Enable"]
110 #[inline(always)]
111 #[must_use]
112 pub fn lpen(&mut self) -> LPEN_W<2> {
113 LPEN_W::new(self)
114 }
115 #[doc = "Bit 3 - Wake Up Fast"]
116 #[inline(always)]
117 #[must_use]
118 pub fn wuf(&mut self) -> WUF_W<3> {
119 WUF_W::new(self)
120 }
121 #[doc = "Bits 4:5 - Reference Clock Selection"]
122 #[inline(always)]
123 #[must_use]
124 pub fn refclk(&mut self) -> REFCLK_W<4> {
125 REFCLK_W::new(self)
126 }
127 #[doc = "Bits 8:10 - Lock Time"]
128 #[inline(always)]
129 #[must_use]
130 pub fn ltime(&mut self) -> LTIME_W<8> {
131 LTIME_W::new(self)
132 }
133 #[doc = "Bit 12 - Lock Bypass"]
134 #[inline(always)]
135 #[must_use]
136 pub fn lbypass(&mut self) -> LBYPASS_W<12> {
137 LBYPASS_W::new(self)
138 }
139 #[doc = "Bits 16:26 - Clock Divider"]
140 #[inline(always)]
141 #[must_use]
142 pub fn div(&mut self) -> DIV_W<16> {
143 DIV_W::new(self)
144 }
145 #[doc = "Writes raw bits to the register."]
146 #[inline(always)]
147 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
148 self.0.bits(bits);
149 self
150 }
151}
152#[doc = "Digital Core Configuration\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dpllctrlb](index.html) module"]
153pub struct DPLLCTRLB_SPEC;
154impl crate::RegisterSpec for DPLLCTRLB_SPEC {
155 type Ux = u32;
156}
157#[doc = "`read()` method returns [dpllctrlb::R](R) reader structure"]
158impl crate::Readable for DPLLCTRLB_SPEC {
159 type Reader = R;
160}
161#[doc = "`write(|w| ..)` method takes [dpllctrlb::W](W) writer structure"]
162impl crate::Writable for DPLLCTRLB_SPEC {
163 type Writer = W;
164 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
165 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
166}
167#[doc = "`reset()` method sets DPLLCTRLB to value 0"]
168impl crate::Resettable for DPLLCTRLB_SPEC {
169 const RESET_VALUE: Self::Ux = 0;
170}