atsaml21e18a/tc0/count16/
ctrla.rs1#[doc = "Register `CTRLA` reader"]
2pub struct R(crate::R<CTRLA_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<CTRLA_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<CTRLA_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<CTRLA_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `CTRLA` writer"]
17pub struct W(crate::W<CTRLA_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<CTRLA_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<CTRLA_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<CTRLA_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `SWRST` writer - Software Reset"]
38pub type SWRST_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRLA_SPEC, bool, O>;
39#[doc = "Field `ENABLE` reader - Enable"]
40pub type ENABLE_R = crate::BitReader<bool>;
41#[doc = "Field `ENABLE` writer - Enable"]
42pub type ENABLE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRLA_SPEC, bool, O>;
43#[doc = "Field `MODE` reader - Timer Counter Mode"]
44pub type MODE_R = crate::FieldReader<u8, MODESELECT_A>;
45#[doc = "Timer Counter Mode\n\nValue on reset: 0"]
46#[derive(Clone, Copy, Debug, PartialEq, Eq)]
47#[repr(u8)]
48pub enum MODESELECT_A {
49 #[doc = "0: Counter in 16-bit mode"]
50 COUNT16 = 0,
51 #[doc = "1: Counter in 8-bit mode"]
52 COUNT8 = 1,
53 #[doc = "2: Counter in 32-bit mode"]
54 COUNT32 = 2,
55}
56impl From<MODESELECT_A> for u8 {
57 #[inline(always)]
58 fn from(variant: MODESELECT_A) -> Self {
59 variant as _
60 }
61}
62impl MODE_R {
63 #[doc = "Get enumerated values variant"]
64 #[inline(always)]
65 pub fn variant(&self) -> Option<MODESELECT_A> {
66 match self.bits {
67 0 => Some(MODESELECT_A::COUNT16),
68 1 => Some(MODESELECT_A::COUNT8),
69 2 => Some(MODESELECT_A::COUNT32),
70 _ => None,
71 }
72 }
73 #[doc = "Checks if the value of the field is `COUNT16`"]
74 #[inline(always)]
75 pub fn is_count16(&self) -> bool {
76 *self == MODESELECT_A::COUNT16
77 }
78 #[doc = "Checks if the value of the field is `COUNT8`"]
79 #[inline(always)]
80 pub fn is_count8(&self) -> bool {
81 *self == MODESELECT_A::COUNT8
82 }
83 #[doc = "Checks if the value of the field is `COUNT32`"]
84 #[inline(always)]
85 pub fn is_count32(&self) -> bool {
86 *self == MODESELECT_A::COUNT32
87 }
88}
89#[doc = "Field `MODE` writer - Timer Counter Mode"]
90pub type MODE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CTRLA_SPEC, u8, MODESELECT_A, 2, O>;
91impl<'a, const O: u8> MODE_W<'a, O> {
92 #[doc = "Counter in 16-bit mode"]
93 #[inline(always)]
94 pub fn count16(self) -> &'a mut W {
95 self.variant(MODESELECT_A::COUNT16)
96 }
97 #[doc = "Counter in 8-bit mode"]
98 #[inline(always)]
99 pub fn count8(self) -> &'a mut W {
100 self.variant(MODESELECT_A::COUNT8)
101 }
102 #[doc = "Counter in 32-bit mode"]
103 #[inline(always)]
104 pub fn count32(self) -> &'a mut W {
105 self.variant(MODESELECT_A::COUNT32)
106 }
107}
108#[doc = "Field `PRESCSYNC` reader - Prescaler and Counter Synchronization"]
109pub type PRESCSYNC_R = crate::FieldReader<u8, PRESCSYNCSELECT_A>;
110#[doc = "Prescaler and Counter Synchronization\n\nValue on reset: 0"]
111#[derive(Clone, Copy, Debug, PartialEq, Eq)]
112#[repr(u8)]
113pub enum PRESCSYNCSELECT_A {
114 #[doc = "0: Reload or reset the counter on next generic clock"]
115 GCLK = 0,
116 #[doc = "1: Reload or reset the counter on next prescaler clock"]
117 PRESC = 1,
118 #[doc = "2: Reload or reset the counter on next generic clock and reset the prescaler counter"]
119 RESYNC = 2,
120}
121impl From<PRESCSYNCSELECT_A> for u8 {
122 #[inline(always)]
123 fn from(variant: PRESCSYNCSELECT_A) -> Self {
124 variant as _
125 }
126}
127impl PRESCSYNC_R {
128 #[doc = "Get enumerated values variant"]
129 #[inline(always)]
130 pub fn variant(&self) -> Option<PRESCSYNCSELECT_A> {
131 match self.bits {
132 0 => Some(PRESCSYNCSELECT_A::GCLK),
133 1 => Some(PRESCSYNCSELECT_A::PRESC),
134 2 => Some(PRESCSYNCSELECT_A::RESYNC),
135 _ => None,
136 }
137 }
138 #[doc = "Checks if the value of the field is `GCLK`"]
139 #[inline(always)]
140 pub fn is_gclk(&self) -> bool {
141 *self == PRESCSYNCSELECT_A::GCLK
142 }
143 #[doc = "Checks if the value of the field is `PRESC`"]
144 #[inline(always)]
145 pub fn is_presc(&self) -> bool {
146 *self == PRESCSYNCSELECT_A::PRESC
147 }
148 #[doc = "Checks if the value of the field is `RESYNC`"]
149 #[inline(always)]
150 pub fn is_resync(&self) -> bool {
151 *self == PRESCSYNCSELECT_A::RESYNC
152 }
153}
154#[doc = "Field `PRESCSYNC` writer - Prescaler and Counter Synchronization"]
155pub type PRESCSYNC_W<'a, const O: u8> =
156 crate::FieldWriter<'a, u32, CTRLA_SPEC, u8, PRESCSYNCSELECT_A, 2, O>;
157impl<'a, const O: u8> PRESCSYNC_W<'a, O> {
158 #[doc = "Reload or reset the counter on next generic clock"]
159 #[inline(always)]
160 pub fn gclk(self) -> &'a mut W {
161 self.variant(PRESCSYNCSELECT_A::GCLK)
162 }
163 #[doc = "Reload or reset the counter on next prescaler clock"]
164 #[inline(always)]
165 pub fn presc(self) -> &'a mut W {
166 self.variant(PRESCSYNCSELECT_A::PRESC)
167 }
168 #[doc = "Reload or reset the counter on next generic clock and reset the prescaler counter"]
169 #[inline(always)]
170 pub fn resync(self) -> &'a mut W {
171 self.variant(PRESCSYNCSELECT_A::RESYNC)
172 }
173}
174#[doc = "Field `RUNSTDBY` reader - Run during Standby"]
175pub type RUNSTDBY_R = crate::BitReader<bool>;
176#[doc = "Field `RUNSTDBY` writer - Run during Standby"]
177pub type RUNSTDBY_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRLA_SPEC, bool, O>;
178#[doc = "Field `ONDEMAND` reader - Clock On Demand"]
179pub type ONDEMAND_R = crate::BitReader<bool>;
180#[doc = "Field `ONDEMAND` writer - Clock On Demand"]
181pub type ONDEMAND_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRLA_SPEC, bool, O>;
182#[doc = "Field `PRESCALER` reader - Prescaler"]
183pub type PRESCALER_R = crate::FieldReader<u8, PRESCALERSELECT_A>;
184#[doc = "Prescaler\n\nValue on reset: 0"]
185#[derive(Clone, Copy, Debug, PartialEq, Eq)]
186#[repr(u8)]
187pub enum PRESCALERSELECT_A {
188 #[doc = "0: Prescaler: GCLK_TC"]
189 DIV1 = 0,
190 #[doc = "1: Prescaler: GCLK_TC/2"]
191 DIV2 = 1,
192 #[doc = "2: Prescaler: GCLK_TC/4"]
193 DIV4 = 2,
194 #[doc = "3: Prescaler: GCLK_TC/8"]
195 DIV8 = 3,
196 #[doc = "4: Prescaler: GCLK_TC/16"]
197 DIV16 = 4,
198 #[doc = "5: Prescaler: GCLK_TC/64"]
199 DIV64 = 5,
200 #[doc = "6: Prescaler: GCLK_TC/256"]
201 DIV256 = 6,
202 #[doc = "7: Prescaler: GCLK_TC/1024"]
203 DIV1024 = 7,
204}
205impl From<PRESCALERSELECT_A> for u8 {
206 #[inline(always)]
207 fn from(variant: PRESCALERSELECT_A) -> Self {
208 variant as _
209 }
210}
211impl PRESCALER_R {
212 #[doc = "Get enumerated values variant"]
213 #[inline(always)]
214 pub fn variant(&self) -> PRESCALERSELECT_A {
215 match self.bits {
216 0 => PRESCALERSELECT_A::DIV1,
217 1 => PRESCALERSELECT_A::DIV2,
218 2 => PRESCALERSELECT_A::DIV4,
219 3 => PRESCALERSELECT_A::DIV8,
220 4 => PRESCALERSELECT_A::DIV16,
221 5 => PRESCALERSELECT_A::DIV64,
222 6 => PRESCALERSELECT_A::DIV256,
223 7 => PRESCALERSELECT_A::DIV1024,
224 _ => unreachable!(),
225 }
226 }
227 #[doc = "Checks if the value of the field is `DIV1`"]
228 #[inline(always)]
229 pub fn is_div1(&self) -> bool {
230 *self == PRESCALERSELECT_A::DIV1
231 }
232 #[doc = "Checks if the value of the field is `DIV2`"]
233 #[inline(always)]
234 pub fn is_div2(&self) -> bool {
235 *self == PRESCALERSELECT_A::DIV2
236 }
237 #[doc = "Checks if the value of the field is `DIV4`"]
238 #[inline(always)]
239 pub fn is_div4(&self) -> bool {
240 *self == PRESCALERSELECT_A::DIV4
241 }
242 #[doc = "Checks if the value of the field is `DIV8`"]
243 #[inline(always)]
244 pub fn is_div8(&self) -> bool {
245 *self == PRESCALERSELECT_A::DIV8
246 }
247 #[doc = "Checks if the value of the field is `DIV16`"]
248 #[inline(always)]
249 pub fn is_div16(&self) -> bool {
250 *self == PRESCALERSELECT_A::DIV16
251 }
252 #[doc = "Checks if the value of the field is `DIV64`"]
253 #[inline(always)]
254 pub fn is_div64(&self) -> bool {
255 *self == PRESCALERSELECT_A::DIV64
256 }
257 #[doc = "Checks if the value of the field is `DIV256`"]
258 #[inline(always)]
259 pub fn is_div256(&self) -> bool {
260 *self == PRESCALERSELECT_A::DIV256
261 }
262 #[doc = "Checks if the value of the field is `DIV1024`"]
263 #[inline(always)]
264 pub fn is_div1024(&self) -> bool {
265 *self == PRESCALERSELECT_A::DIV1024
266 }
267}
268#[doc = "Field `PRESCALER` writer - Prescaler"]
269pub type PRESCALER_W<'a, const O: u8> =
270 crate::FieldWriterSafe<'a, u32, CTRLA_SPEC, u8, PRESCALERSELECT_A, 3, O>;
271impl<'a, const O: u8> PRESCALER_W<'a, O> {
272 #[doc = "Prescaler: GCLK_TC"]
273 #[inline(always)]
274 pub fn div1(self) -> &'a mut W {
275 self.variant(PRESCALERSELECT_A::DIV1)
276 }
277 #[doc = "Prescaler: GCLK_TC/2"]
278 #[inline(always)]
279 pub fn div2(self) -> &'a mut W {
280 self.variant(PRESCALERSELECT_A::DIV2)
281 }
282 #[doc = "Prescaler: GCLK_TC/4"]
283 #[inline(always)]
284 pub fn div4(self) -> &'a mut W {
285 self.variant(PRESCALERSELECT_A::DIV4)
286 }
287 #[doc = "Prescaler: GCLK_TC/8"]
288 #[inline(always)]
289 pub fn div8(self) -> &'a mut W {
290 self.variant(PRESCALERSELECT_A::DIV8)
291 }
292 #[doc = "Prescaler: GCLK_TC/16"]
293 #[inline(always)]
294 pub fn div16(self) -> &'a mut W {
295 self.variant(PRESCALERSELECT_A::DIV16)
296 }
297 #[doc = "Prescaler: GCLK_TC/64"]
298 #[inline(always)]
299 pub fn div64(self) -> &'a mut W {
300 self.variant(PRESCALERSELECT_A::DIV64)
301 }
302 #[doc = "Prescaler: GCLK_TC/256"]
303 #[inline(always)]
304 pub fn div256(self) -> &'a mut W {
305 self.variant(PRESCALERSELECT_A::DIV256)
306 }
307 #[doc = "Prescaler: GCLK_TC/1024"]
308 #[inline(always)]
309 pub fn div1024(self) -> &'a mut W {
310 self.variant(PRESCALERSELECT_A::DIV1024)
311 }
312}
313#[doc = "Field `ALOCK` reader - Auto Lock"]
314pub type ALOCK_R = crate::BitReader<bool>;
315#[doc = "Field `ALOCK` writer - Auto Lock"]
316pub type ALOCK_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRLA_SPEC, bool, O>;
317#[doc = "Field `CAPTEN0` reader - Capture Channel 0 Enable"]
318pub type CAPTEN0_R = crate::BitReader<bool>;
319#[doc = "Field `CAPTEN0` writer - Capture Channel 0 Enable"]
320pub type CAPTEN0_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRLA_SPEC, bool, O>;
321#[doc = "Field `CAPTEN1` reader - Capture Channel 1 Enable"]
322pub type CAPTEN1_R = crate::BitReader<bool>;
323#[doc = "Field `CAPTEN1` writer - Capture Channel 1 Enable"]
324pub type CAPTEN1_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRLA_SPEC, bool, O>;
325#[doc = "Field `COPEN0` reader - Capture On Pin 0 Enable"]
326pub type COPEN0_R = crate::BitReader<bool>;
327#[doc = "Field `COPEN0` writer - Capture On Pin 0 Enable"]
328pub type COPEN0_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRLA_SPEC, bool, O>;
329#[doc = "Field `COPEN1` reader - Capture On Pin 1 Enable"]
330pub type COPEN1_R = crate::BitReader<bool>;
331#[doc = "Field `COPEN1` writer - Capture On Pin 1 Enable"]
332pub type COPEN1_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRLA_SPEC, bool, O>;
333impl R {
334 #[doc = "Bit 1 - Enable"]
335 #[inline(always)]
336 pub fn enable(&self) -> ENABLE_R {
337 ENABLE_R::new(((self.bits >> 1) & 1) != 0)
338 }
339 #[doc = "Bits 2:3 - Timer Counter Mode"]
340 #[inline(always)]
341 pub fn mode(&self) -> MODE_R {
342 MODE_R::new(((self.bits >> 2) & 3) as u8)
343 }
344 #[doc = "Bits 4:5 - Prescaler and Counter Synchronization"]
345 #[inline(always)]
346 pub fn prescsync(&self) -> PRESCSYNC_R {
347 PRESCSYNC_R::new(((self.bits >> 4) & 3) as u8)
348 }
349 #[doc = "Bit 6 - Run during Standby"]
350 #[inline(always)]
351 pub fn runstdby(&self) -> RUNSTDBY_R {
352 RUNSTDBY_R::new(((self.bits >> 6) & 1) != 0)
353 }
354 #[doc = "Bit 7 - Clock On Demand"]
355 #[inline(always)]
356 pub fn ondemand(&self) -> ONDEMAND_R {
357 ONDEMAND_R::new(((self.bits >> 7) & 1) != 0)
358 }
359 #[doc = "Bits 8:10 - Prescaler"]
360 #[inline(always)]
361 pub fn prescaler(&self) -> PRESCALER_R {
362 PRESCALER_R::new(((self.bits >> 8) & 7) as u8)
363 }
364 #[doc = "Bit 11 - Auto Lock"]
365 #[inline(always)]
366 pub fn alock(&self) -> ALOCK_R {
367 ALOCK_R::new(((self.bits >> 11) & 1) != 0)
368 }
369 #[doc = "Bit 16 - Capture Channel 0 Enable"]
370 #[inline(always)]
371 pub fn capten0(&self) -> CAPTEN0_R {
372 CAPTEN0_R::new(((self.bits >> 16) & 1) != 0)
373 }
374 #[doc = "Bit 17 - Capture Channel 1 Enable"]
375 #[inline(always)]
376 pub fn capten1(&self) -> CAPTEN1_R {
377 CAPTEN1_R::new(((self.bits >> 17) & 1) != 0)
378 }
379 #[doc = "Bit 20 - Capture On Pin 0 Enable"]
380 #[inline(always)]
381 pub fn copen0(&self) -> COPEN0_R {
382 COPEN0_R::new(((self.bits >> 20) & 1) != 0)
383 }
384 #[doc = "Bit 21 - Capture On Pin 1 Enable"]
385 #[inline(always)]
386 pub fn copen1(&self) -> COPEN1_R {
387 COPEN1_R::new(((self.bits >> 21) & 1) != 0)
388 }
389}
390impl W {
391 #[doc = "Bit 0 - Software Reset"]
392 #[inline(always)]
393 #[must_use]
394 pub fn swrst(&mut self) -> SWRST_W<0> {
395 SWRST_W::new(self)
396 }
397 #[doc = "Bit 1 - Enable"]
398 #[inline(always)]
399 #[must_use]
400 pub fn enable(&mut self) -> ENABLE_W<1> {
401 ENABLE_W::new(self)
402 }
403 #[doc = "Bits 2:3 - Timer Counter Mode"]
404 #[inline(always)]
405 #[must_use]
406 pub fn mode(&mut self) -> MODE_W<2> {
407 MODE_W::new(self)
408 }
409 #[doc = "Bits 4:5 - Prescaler and Counter Synchronization"]
410 #[inline(always)]
411 #[must_use]
412 pub fn prescsync(&mut self) -> PRESCSYNC_W<4> {
413 PRESCSYNC_W::new(self)
414 }
415 #[doc = "Bit 6 - Run during Standby"]
416 #[inline(always)]
417 #[must_use]
418 pub fn runstdby(&mut self) -> RUNSTDBY_W<6> {
419 RUNSTDBY_W::new(self)
420 }
421 #[doc = "Bit 7 - Clock On Demand"]
422 #[inline(always)]
423 #[must_use]
424 pub fn ondemand(&mut self) -> ONDEMAND_W<7> {
425 ONDEMAND_W::new(self)
426 }
427 #[doc = "Bits 8:10 - Prescaler"]
428 #[inline(always)]
429 #[must_use]
430 pub fn prescaler(&mut self) -> PRESCALER_W<8> {
431 PRESCALER_W::new(self)
432 }
433 #[doc = "Bit 11 - Auto Lock"]
434 #[inline(always)]
435 #[must_use]
436 pub fn alock(&mut self) -> ALOCK_W<11> {
437 ALOCK_W::new(self)
438 }
439 #[doc = "Bit 16 - Capture Channel 0 Enable"]
440 #[inline(always)]
441 #[must_use]
442 pub fn capten0(&mut self) -> CAPTEN0_W<16> {
443 CAPTEN0_W::new(self)
444 }
445 #[doc = "Bit 17 - Capture Channel 1 Enable"]
446 #[inline(always)]
447 #[must_use]
448 pub fn capten1(&mut self) -> CAPTEN1_W<17> {
449 CAPTEN1_W::new(self)
450 }
451 #[doc = "Bit 20 - Capture On Pin 0 Enable"]
452 #[inline(always)]
453 #[must_use]
454 pub fn copen0(&mut self) -> COPEN0_W<20> {
455 COPEN0_W::new(self)
456 }
457 #[doc = "Bit 21 - Capture On Pin 1 Enable"]
458 #[inline(always)]
459 #[must_use]
460 pub fn copen1(&mut self) -> COPEN1_W<21> {
461 COPEN1_W::new(self)
462 }
463 #[doc = "Writes raw bits to the register."]
464 #[inline(always)]
465 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
466 self.0.bits(bits);
467 self
468 }
469}
470#[doc = "Control A\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrla](index.html) module"]
471pub struct CTRLA_SPEC;
472impl crate::RegisterSpec for CTRLA_SPEC {
473 type Ux = u32;
474}
475#[doc = "`read()` method returns [ctrla::R](R) reader structure"]
476impl crate::Readable for CTRLA_SPEC {
477 type Reader = R;
478}
479#[doc = "`write(|w| ..)` method takes [ctrla::W](W) writer structure"]
480impl crate::Writable for CTRLA_SPEC {
481 type Writer = W;
482 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
483 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
484}
485#[doc = "`reset()` method sets CTRLA to value 0"]
486impl crate::Resettable for CTRLA_SPEC {
487 const RESET_VALUE: Self::Ux = 0;
488}