1#[doc = "Register `CTRLB` reader"]
2pub struct R(crate::R<CTRLB_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<CTRLB_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<CTRLB_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<CTRLB_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `CTRLB` writer"]
17pub struct W(crate::W<CTRLB_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<CTRLB_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<CTRLB_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<CTRLB_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `RWS` reader - NVM Read Wait States"]
38pub type RWS_R = crate::FieldReader<u8, RWSSELECT_A>;
39#[doc = "NVM Read Wait States\n\nValue on reset: 0"]
40#[derive(Clone, Copy, Debug, PartialEq, Eq)]
41#[repr(u8)]
42pub enum RWSSELECT_A {
43 #[doc = "0: Single Auto Wait State"]
44 SINGLE = 0,
45 #[doc = "1: Half Auto Wait State"]
46 HALF = 1,
47 #[doc = "2: Dual Auto Wait State"]
48 DUAL = 2,
49}
50impl From<RWSSELECT_A> for u8 {
51 #[inline(always)]
52 fn from(variant: RWSSELECT_A) -> Self {
53 variant as _
54 }
55}
56impl RWS_R {
57 #[doc = "Get enumerated values variant"]
58 #[inline(always)]
59 pub fn variant(&self) -> Option<RWSSELECT_A> {
60 match self.bits {
61 0 => Some(RWSSELECT_A::SINGLE),
62 1 => Some(RWSSELECT_A::HALF),
63 2 => Some(RWSSELECT_A::DUAL),
64 _ => None,
65 }
66 }
67 #[doc = "Checks if the value of the field is `SINGLE`"]
68 #[inline(always)]
69 pub fn is_single(&self) -> bool {
70 *self == RWSSELECT_A::SINGLE
71 }
72 #[doc = "Checks if the value of the field is `HALF`"]
73 #[inline(always)]
74 pub fn is_half(&self) -> bool {
75 *self == RWSSELECT_A::HALF
76 }
77 #[doc = "Checks if the value of the field is `DUAL`"]
78 #[inline(always)]
79 pub fn is_dual(&self) -> bool {
80 *self == RWSSELECT_A::DUAL
81 }
82}
83#[doc = "Field `RWS` writer - NVM Read Wait States"]
84pub type RWS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CTRLB_SPEC, u8, RWSSELECT_A, 4, O>;
85impl<'a, const O: u8> RWS_W<'a, O> {
86 #[doc = "Single Auto Wait State"]
87 #[inline(always)]
88 pub fn single(self) -> &'a mut W {
89 self.variant(RWSSELECT_A::SINGLE)
90 }
91 #[doc = "Half Auto Wait State"]
92 #[inline(always)]
93 pub fn half(self) -> &'a mut W {
94 self.variant(RWSSELECT_A::HALF)
95 }
96 #[doc = "Dual Auto Wait State"]
97 #[inline(always)]
98 pub fn dual(self) -> &'a mut W {
99 self.variant(RWSSELECT_A::DUAL)
100 }
101}
102#[doc = "Field `MANW` reader - Manual Write"]
103pub type MANW_R = crate::BitReader<bool>;
104#[doc = "Field `MANW` writer - Manual Write"]
105pub type MANW_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRLB_SPEC, bool, O>;
106#[doc = "Field `SLEEPPRM` reader - Power Reduction Mode during Sleep"]
107pub type SLEEPPRM_R = crate::FieldReader<u8, SLEEPPRMSELECT_A>;
108#[doc = "Power Reduction Mode during Sleep\n\nValue on reset: 0"]
109#[derive(Clone, Copy, Debug, PartialEq, Eq)]
110#[repr(u8)]
111pub enum SLEEPPRMSELECT_A {
112 #[doc = "0: NVM block enters low-power mode when entering sleep.NVM block exits low-power mode upon first access."]
113 WAKEONACCESS = 0,
114 #[doc = "1: NVM block enters low-power mode when entering sleep.NVM block exits low-power mode when exiting sleep."]
115 WAKEUPINSTANT = 1,
116 #[doc = "3: Auto power reduction disabled."]
117 DISABLED = 3,
118}
119impl From<SLEEPPRMSELECT_A> for u8 {
120 #[inline(always)]
121 fn from(variant: SLEEPPRMSELECT_A) -> Self {
122 variant as _
123 }
124}
125impl SLEEPPRM_R {
126 #[doc = "Get enumerated values variant"]
127 #[inline(always)]
128 pub fn variant(&self) -> Option<SLEEPPRMSELECT_A> {
129 match self.bits {
130 0 => Some(SLEEPPRMSELECT_A::WAKEONACCESS),
131 1 => Some(SLEEPPRMSELECT_A::WAKEUPINSTANT),
132 3 => Some(SLEEPPRMSELECT_A::DISABLED),
133 _ => None,
134 }
135 }
136 #[doc = "Checks if the value of the field is `WAKEONACCESS`"]
137 #[inline(always)]
138 pub fn is_wakeonaccess(&self) -> bool {
139 *self == SLEEPPRMSELECT_A::WAKEONACCESS
140 }
141 #[doc = "Checks if the value of the field is `WAKEUPINSTANT`"]
142 #[inline(always)]
143 pub fn is_wakeupinstant(&self) -> bool {
144 *self == SLEEPPRMSELECT_A::WAKEUPINSTANT
145 }
146 #[doc = "Checks if the value of the field is `DISABLED`"]
147 #[inline(always)]
148 pub fn is_disabled(&self) -> bool {
149 *self == SLEEPPRMSELECT_A::DISABLED
150 }
151}
152#[doc = "Field `SLEEPPRM` writer - Power Reduction Mode during Sleep"]
153pub type SLEEPPRM_W<'a, const O: u8> =
154 crate::FieldWriter<'a, u32, CTRLB_SPEC, u8, SLEEPPRMSELECT_A, 2, O>;
155impl<'a, const O: u8> SLEEPPRM_W<'a, O> {
156 #[doc = "NVM block enters low-power mode when entering sleep.NVM block exits low-power mode upon first access."]
157 #[inline(always)]
158 pub fn wakeonaccess(self) -> &'a mut W {
159 self.variant(SLEEPPRMSELECT_A::WAKEONACCESS)
160 }
161 #[doc = "NVM block enters low-power mode when entering sleep.NVM block exits low-power mode when exiting sleep."]
162 #[inline(always)]
163 pub fn wakeupinstant(self) -> &'a mut W {
164 self.variant(SLEEPPRMSELECT_A::WAKEUPINSTANT)
165 }
166 #[doc = "Auto power reduction disabled."]
167 #[inline(always)]
168 pub fn disabled(self) -> &'a mut W {
169 self.variant(SLEEPPRMSELECT_A::DISABLED)
170 }
171}
172#[doc = "Field `FWUP` reader - fast wake-up"]
173pub type FWUP_R = crate::BitReader<bool>;
174#[doc = "Field `FWUP` writer - fast wake-up"]
175pub type FWUP_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRLB_SPEC, bool, O>;
176#[doc = "Field `READMODE` reader - NVMCTRL Read Mode"]
177pub type READMODE_R = crate::FieldReader<u8, READMODESELECT_A>;
178#[doc = "NVMCTRL Read Mode\n\nValue on reset: 0"]
179#[derive(Clone, Copy, Debug, PartialEq, Eq)]
180#[repr(u8)]
181pub enum READMODESELECT_A {
182 #[doc = "0: The NVM Controller (cache system) does not insert wait states on a cache miss. Gives the best system performance."]
183 NO_MISS_PENALTY = 0,
184 #[doc = "1: Reduces power consumption of the cache system, but inserts a wait state each time there is a cache miss. This mode may not be relevant if CPU performance is required, as the application will be stalled and may lead to increase run time."]
185 LOW_POWER = 1,
186 #[doc = "2: The cache system ensures that a cache hit or miss takes the same amount of time, determined by the number of programmed flash wait states. This mode can be used for real-time applications that require deterministic execution timings."]
187 DETERMINISTIC = 2,
188}
189impl From<READMODESELECT_A> for u8 {
190 #[inline(always)]
191 fn from(variant: READMODESELECT_A) -> Self {
192 variant as _
193 }
194}
195impl READMODE_R {
196 #[doc = "Get enumerated values variant"]
197 #[inline(always)]
198 pub fn variant(&self) -> Option<READMODESELECT_A> {
199 match self.bits {
200 0 => Some(READMODESELECT_A::NO_MISS_PENALTY),
201 1 => Some(READMODESELECT_A::LOW_POWER),
202 2 => Some(READMODESELECT_A::DETERMINISTIC),
203 _ => None,
204 }
205 }
206 #[doc = "Checks if the value of the field is `NO_MISS_PENALTY`"]
207 #[inline(always)]
208 pub fn is_no_miss_penalty(&self) -> bool {
209 *self == READMODESELECT_A::NO_MISS_PENALTY
210 }
211 #[doc = "Checks if the value of the field is `LOW_POWER`"]
212 #[inline(always)]
213 pub fn is_low_power(&self) -> bool {
214 *self == READMODESELECT_A::LOW_POWER
215 }
216 #[doc = "Checks if the value of the field is `DETERMINISTIC`"]
217 #[inline(always)]
218 pub fn is_deterministic(&self) -> bool {
219 *self == READMODESELECT_A::DETERMINISTIC
220 }
221}
222#[doc = "Field `READMODE` writer - NVMCTRL Read Mode"]
223pub type READMODE_W<'a, const O: u8> =
224 crate::FieldWriter<'a, u32, CTRLB_SPEC, u8, READMODESELECT_A, 2, O>;
225impl<'a, const O: u8> READMODE_W<'a, O> {
226 #[doc = "The NVM Controller (cache system) does not insert wait states on a cache miss. Gives the best system performance."]
227 #[inline(always)]
228 pub fn no_miss_penalty(self) -> &'a mut W {
229 self.variant(READMODESELECT_A::NO_MISS_PENALTY)
230 }
231 #[doc = "Reduces power consumption of the cache system, but inserts a wait state each time there is a cache miss. This mode may not be relevant if CPU performance is required, as the application will be stalled and may lead to increase run time."]
232 #[inline(always)]
233 pub fn low_power(self) -> &'a mut W {
234 self.variant(READMODESELECT_A::LOW_POWER)
235 }
236 #[doc = "The cache system ensures that a cache hit or miss takes the same amount of time, determined by the number of programmed flash wait states. This mode can be used for real-time applications that require deterministic execution timings."]
237 #[inline(always)]
238 pub fn deterministic(self) -> &'a mut W {
239 self.variant(READMODESELECT_A::DETERMINISTIC)
240 }
241}
242#[doc = "Field `CACHEDIS` reader - Cache Disable"]
243pub type CACHEDIS_R = crate::BitReader<bool>;
244#[doc = "Field `CACHEDIS` writer - Cache Disable"]
245pub type CACHEDIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRLB_SPEC, bool, O>;
246impl R {
247 #[doc = "Bits 1:4 - NVM Read Wait States"]
248 #[inline(always)]
249 pub fn rws(&self) -> RWS_R {
250 RWS_R::new(((self.bits >> 1) & 0x0f) as u8)
251 }
252 #[doc = "Bit 7 - Manual Write"]
253 #[inline(always)]
254 pub fn manw(&self) -> MANW_R {
255 MANW_R::new(((self.bits >> 7) & 1) != 0)
256 }
257 #[doc = "Bits 8:9 - Power Reduction Mode during Sleep"]
258 #[inline(always)]
259 pub fn sleepprm(&self) -> SLEEPPRM_R {
260 SLEEPPRM_R::new(((self.bits >> 8) & 3) as u8)
261 }
262 #[doc = "Bit 11 - fast wake-up"]
263 #[inline(always)]
264 pub fn fwup(&self) -> FWUP_R {
265 FWUP_R::new(((self.bits >> 11) & 1) != 0)
266 }
267 #[doc = "Bits 16:17 - NVMCTRL Read Mode"]
268 #[inline(always)]
269 pub fn readmode(&self) -> READMODE_R {
270 READMODE_R::new(((self.bits >> 16) & 3) as u8)
271 }
272 #[doc = "Bit 18 - Cache Disable"]
273 #[inline(always)]
274 pub fn cachedis(&self) -> CACHEDIS_R {
275 CACHEDIS_R::new(((self.bits >> 18) & 1) != 0)
276 }
277}
278impl W {
279 #[doc = "Bits 1:4 - NVM Read Wait States"]
280 #[inline(always)]
281 #[must_use]
282 pub fn rws(&mut self) -> RWS_W<1> {
283 RWS_W::new(self)
284 }
285 #[doc = "Bit 7 - Manual Write"]
286 #[inline(always)]
287 #[must_use]
288 pub fn manw(&mut self) -> MANW_W<7> {
289 MANW_W::new(self)
290 }
291 #[doc = "Bits 8:9 - Power Reduction Mode during Sleep"]
292 #[inline(always)]
293 #[must_use]
294 pub fn sleepprm(&mut self) -> SLEEPPRM_W<8> {
295 SLEEPPRM_W::new(self)
296 }
297 #[doc = "Bit 11 - fast wake-up"]
298 #[inline(always)]
299 #[must_use]
300 pub fn fwup(&mut self) -> FWUP_W<11> {
301 FWUP_W::new(self)
302 }
303 #[doc = "Bits 16:17 - NVMCTRL Read Mode"]
304 #[inline(always)]
305 #[must_use]
306 pub fn readmode(&mut self) -> READMODE_W<16> {
307 READMODE_W::new(self)
308 }
309 #[doc = "Bit 18 - Cache Disable"]
310 #[inline(always)]
311 #[must_use]
312 pub fn cachedis(&mut self) -> CACHEDIS_W<18> {
313 CACHEDIS_W::new(self)
314 }
315 #[doc = "Writes raw bits to the register."]
316 #[inline(always)]
317 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
318 self.0.bits(bits);
319 self
320 }
321}
322#[doc = "Control B\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrlb](index.html) module"]
323pub struct CTRLB_SPEC;
324impl crate::RegisterSpec for CTRLB_SPEC {
325 type Ux = u32;
326}
327#[doc = "`read()` method returns [ctrlb::R](R) reader structure"]
328impl crate::Readable for CTRLB_SPEC {
329 type Reader = R;
330}
331#[doc = "`write(|w| ..)` method takes [ctrlb::W](W) writer structure"]
332impl crate::Writable for CTRLB_SPEC {
333 type Writer = W;
334 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
335 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
336}
337#[doc = "`reset()` method sets CTRLB to value 0"]
338impl crate::Resettable for CTRLB_SPEC {
339 const RESET_VALUE: Self::Ux = 0;
340}