atsaml21e17b/tcc0/
wave.rs

1#[doc = "Register `WAVE` reader"]
2pub struct R(crate::R<WAVE_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<WAVE_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<WAVE_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<WAVE_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `WAVE` writer"]
17pub struct W(crate::W<WAVE_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<WAVE_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<WAVE_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<WAVE_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `WAVEGEN` reader - Waveform Generation"]
38pub type WAVEGEN_R = crate::FieldReader<u8, WAVEGENSELECT_A>;
39#[doc = "Waveform Generation\n\nValue on reset: 0"]
40#[derive(Clone, Copy, Debug, PartialEq, Eq)]
41#[repr(u8)]
42pub enum WAVEGENSELECT_A {
43    #[doc = "0: Normal frequency"]
44    NFRQ = 0,
45    #[doc = "1: Match frequency"]
46    MFRQ = 1,
47    #[doc = "2: Normal PWM"]
48    NPWM = 2,
49    #[doc = "4: Dual-slope critical"]
50    DSCRITICAL = 4,
51    #[doc = "5: Dual-slope with interrupt/event condition when COUNT reaches ZERO"]
52    DSBOTTOM = 5,
53    #[doc = "6: Dual-slope with interrupt/event condition when COUNT reaches ZERO or TOP"]
54    DSBOTH = 6,
55    #[doc = "7: Dual-slope with interrupt/event condition when COUNT reaches TOP"]
56    DSTOP = 7,
57}
58impl From<WAVEGENSELECT_A> for u8 {
59    #[inline(always)]
60    fn from(variant: WAVEGENSELECT_A) -> Self {
61        variant as _
62    }
63}
64impl WAVEGEN_R {
65    #[doc = "Get enumerated values variant"]
66    #[inline(always)]
67    pub fn variant(&self) -> Option<WAVEGENSELECT_A> {
68        match self.bits {
69            0 => Some(WAVEGENSELECT_A::NFRQ),
70            1 => Some(WAVEGENSELECT_A::MFRQ),
71            2 => Some(WAVEGENSELECT_A::NPWM),
72            4 => Some(WAVEGENSELECT_A::DSCRITICAL),
73            5 => Some(WAVEGENSELECT_A::DSBOTTOM),
74            6 => Some(WAVEGENSELECT_A::DSBOTH),
75            7 => Some(WAVEGENSELECT_A::DSTOP),
76            _ => None,
77        }
78    }
79    #[doc = "Checks if the value of the field is `NFRQ`"]
80    #[inline(always)]
81    pub fn is_nfrq(&self) -> bool {
82        *self == WAVEGENSELECT_A::NFRQ
83    }
84    #[doc = "Checks if the value of the field is `MFRQ`"]
85    #[inline(always)]
86    pub fn is_mfrq(&self) -> bool {
87        *self == WAVEGENSELECT_A::MFRQ
88    }
89    #[doc = "Checks if the value of the field is `NPWM`"]
90    #[inline(always)]
91    pub fn is_npwm(&self) -> bool {
92        *self == WAVEGENSELECT_A::NPWM
93    }
94    #[doc = "Checks if the value of the field is `DSCRITICAL`"]
95    #[inline(always)]
96    pub fn is_dscritical(&self) -> bool {
97        *self == WAVEGENSELECT_A::DSCRITICAL
98    }
99    #[doc = "Checks if the value of the field is `DSBOTTOM`"]
100    #[inline(always)]
101    pub fn is_dsbottom(&self) -> bool {
102        *self == WAVEGENSELECT_A::DSBOTTOM
103    }
104    #[doc = "Checks if the value of the field is `DSBOTH`"]
105    #[inline(always)]
106    pub fn is_dsboth(&self) -> bool {
107        *self == WAVEGENSELECT_A::DSBOTH
108    }
109    #[doc = "Checks if the value of the field is `DSTOP`"]
110    #[inline(always)]
111    pub fn is_dstop(&self) -> bool {
112        *self == WAVEGENSELECT_A::DSTOP
113    }
114}
115#[doc = "Field `WAVEGEN` writer - Waveform Generation"]
116pub type WAVEGEN_W<'a, const O: u8> =
117    crate::FieldWriter<'a, u32, WAVE_SPEC, u8, WAVEGENSELECT_A, 3, O>;
118impl<'a, const O: u8> WAVEGEN_W<'a, O> {
119    #[doc = "Normal frequency"]
120    #[inline(always)]
121    pub fn nfrq(self) -> &'a mut W {
122        self.variant(WAVEGENSELECT_A::NFRQ)
123    }
124    #[doc = "Match frequency"]
125    #[inline(always)]
126    pub fn mfrq(self) -> &'a mut W {
127        self.variant(WAVEGENSELECT_A::MFRQ)
128    }
129    #[doc = "Normal PWM"]
130    #[inline(always)]
131    pub fn npwm(self) -> &'a mut W {
132        self.variant(WAVEGENSELECT_A::NPWM)
133    }
134    #[doc = "Dual-slope critical"]
135    #[inline(always)]
136    pub fn dscritical(self) -> &'a mut W {
137        self.variant(WAVEGENSELECT_A::DSCRITICAL)
138    }
139    #[doc = "Dual-slope with interrupt/event condition when COUNT reaches ZERO"]
140    #[inline(always)]
141    pub fn dsbottom(self) -> &'a mut W {
142        self.variant(WAVEGENSELECT_A::DSBOTTOM)
143    }
144    #[doc = "Dual-slope with interrupt/event condition when COUNT reaches ZERO or TOP"]
145    #[inline(always)]
146    pub fn dsboth(self) -> &'a mut W {
147        self.variant(WAVEGENSELECT_A::DSBOTH)
148    }
149    #[doc = "Dual-slope with interrupt/event condition when COUNT reaches TOP"]
150    #[inline(always)]
151    pub fn dstop(self) -> &'a mut W {
152        self.variant(WAVEGENSELECT_A::DSTOP)
153    }
154}
155#[doc = "Field `RAMP` reader - Ramp Mode"]
156pub type RAMP_R = crate::FieldReader<u8, RAMPSELECT_A>;
157#[doc = "Ramp Mode\n\nValue on reset: 0"]
158#[derive(Clone, Copy, Debug, PartialEq, Eq)]
159#[repr(u8)]
160pub enum RAMPSELECT_A {
161    #[doc = "0: RAMP1 operation"]
162    RAMP1 = 0,
163    #[doc = "1: Alternative RAMP2 operation"]
164    RAMP2A = 1,
165    #[doc = "2: RAMP2 operation"]
166    RAMP2 = 2,
167    #[doc = "3: Critical RAMP2 operation"]
168    RAMP2C = 3,
169}
170impl From<RAMPSELECT_A> for u8 {
171    #[inline(always)]
172    fn from(variant: RAMPSELECT_A) -> Self {
173        variant as _
174    }
175}
176impl RAMP_R {
177    #[doc = "Get enumerated values variant"]
178    #[inline(always)]
179    pub fn variant(&self) -> RAMPSELECT_A {
180        match self.bits {
181            0 => RAMPSELECT_A::RAMP1,
182            1 => RAMPSELECT_A::RAMP2A,
183            2 => RAMPSELECT_A::RAMP2,
184            3 => RAMPSELECT_A::RAMP2C,
185            _ => unreachable!(),
186        }
187    }
188    #[doc = "Checks if the value of the field is `RAMP1`"]
189    #[inline(always)]
190    pub fn is_ramp1(&self) -> bool {
191        *self == RAMPSELECT_A::RAMP1
192    }
193    #[doc = "Checks if the value of the field is `RAMP2A`"]
194    #[inline(always)]
195    pub fn is_ramp2a(&self) -> bool {
196        *self == RAMPSELECT_A::RAMP2A
197    }
198    #[doc = "Checks if the value of the field is `RAMP2`"]
199    #[inline(always)]
200    pub fn is_ramp2(&self) -> bool {
201        *self == RAMPSELECT_A::RAMP2
202    }
203    #[doc = "Checks if the value of the field is `RAMP2C`"]
204    #[inline(always)]
205    pub fn is_ramp2c(&self) -> bool {
206        *self == RAMPSELECT_A::RAMP2C
207    }
208}
209#[doc = "Field `RAMP` writer - Ramp Mode"]
210pub type RAMP_W<'a, const O: u8> =
211    crate::FieldWriterSafe<'a, u32, WAVE_SPEC, u8, RAMPSELECT_A, 2, O>;
212impl<'a, const O: u8> RAMP_W<'a, O> {
213    #[doc = "RAMP1 operation"]
214    #[inline(always)]
215    pub fn ramp1(self) -> &'a mut W {
216        self.variant(RAMPSELECT_A::RAMP1)
217    }
218    #[doc = "Alternative RAMP2 operation"]
219    #[inline(always)]
220    pub fn ramp2a(self) -> &'a mut W {
221        self.variant(RAMPSELECT_A::RAMP2A)
222    }
223    #[doc = "RAMP2 operation"]
224    #[inline(always)]
225    pub fn ramp2(self) -> &'a mut W {
226        self.variant(RAMPSELECT_A::RAMP2)
227    }
228    #[doc = "Critical RAMP2 operation"]
229    #[inline(always)]
230    pub fn ramp2c(self) -> &'a mut W {
231        self.variant(RAMPSELECT_A::RAMP2C)
232    }
233}
234#[doc = "Field `CIPEREN` reader - Circular period Enable"]
235pub type CIPEREN_R = crate::BitReader<bool>;
236#[doc = "Field `CIPEREN` writer - Circular period Enable"]
237pub type CIPEREN_W<'a, const O: u8> = crate::BitWriter<'a, u32, WAVE_SPEC, bool, O>;
238#[doc = "Field `CICCEN0` reader - Circular Channel 0 Enable"]
239pub type CICCEN0_R = crate::BitReader<bool>;
240#[doc = "Field `CICCEN0` writer - Circular Channel 0 Enable"]
241pub type CICCEN0_W<'a, const O: u8> = crate::BitWriter<'a, u32, WAVE_SPEC, bool, O>;
242#[doc = "Field `CICCEN1` reader - Circular Channel 1 Enable"]
243pub type CICCEN1_R = crate::BitReader<bool>;
244#[doc = "Field `CICCEN1` writer - Circular Channel 1 Enable"]
245pub type CICCEN1_W<'a, const O: u8> = crate::BitWriter<'a, u32, WAVE_SPEC, bool, O>;
246#[doc = "Field `CICCEN2` reader - Circular Channel 2 Enable"]
247pub type CICCEN2_R = crate::BitReader<bool>;
248#[doc = "Field `CICCEN2` writer - Circular Channel 2 Enable"]
249pub type CICCEN2_W<'a, const O: u8> = crate::BitWriter<'a, u32, WAVE_SPEC, bool, O>;
250#[doc = "Field `CICCEN3` reader - Circular Channel 3 Enable"]
251pub type CICCEN3_R = crate::BitReader<bool>;
252#[doc = "Field `CICCEN3` writer - Circular Channel 3 Enable"]
253pub type CICCEN3_W<'a, const O: u8> = crate::BitWriter<'a, u32, WAVE_SPEC, bool, O>;
254#[doc = "Field `POL0` reader - Channel 0 Polarity"]
255pub type POL0_R = crate::BitReader<bool>;
256#[doc = "Field `POL0` writer - Channel 0 Polarity"]
257pub type POL0_W<'a, const O: u8> = crate::BitWriter<'a, u32, WAVE_SPEC, bool, O>;
258#[doc = "Field `POL1` reader - Channel 1 Polarity"]
259pub type POL1_R = crate::BitReader<bool>;
260#[doc = "Field `POL1` writer - Channel 1 Polarity"]
261pub type POL1_W<'a, const O: u8> = crate::BitWriter<'a, u32, WAVE_SPEC, bool, O>;
262#[doc = "Field `POL2` reader - Channel 2 Polarity"]
263pub type POL2_R = crate::BitReader<bool>;
264#[doc = "Field `POL2` writer - Channel 2 Polarity"]
265pub type POL2_W<'a, const O: u8> = crate::BitWriter<'a, u32, WAVE_SPEC, bool, O>;
266#[doc = "Field `POL3` reader - Channel 3 Polarity"]
267pub type POL3_R = crate::BitReader<bool>;
268#[doc = "Field `POL3` writer - Channel 3 Polarity"]
269pub type POL3_W<'a, const O: u8> = crate::BitWriter<'a, u32, WAVE_SPEC, bool, O>;
270#[doc = "Field `SWAP0` reader - Swap DTI Output Pair 0"]
271pub type SWAP0_R = crate::BitReader<bool>;
272#[doc = "Field `SWAP0` writer - Swap DTI Output Pair 0"]
273pub type SWAP0_W<'a, const O: u8> = crate::BitWriter<'a, u32, WAVE_SPEC, bool, O>;
274#[doc = "Field `SWAP1` reader - Swap DTI Output Pair 1"]
275pub type SWAP1_R = crate::BitReader<bool>;
276#[doc = "Field `SWAP1` writer - Swap DTI Output Pair 1"]
277pub type SWAP1_W<'a, const O: u8> = crate::BitWriter<'a, u32, WAVE_SPEC, bool, O>;
278#[doc = "Field `SWAP2` reader - Swap DTI Output Pair 2"]
279pub type SWAP2_R = crate::BitReader<bool>;
280#[doc = "Field `SWAP2` writer - Swap DTI Output Pair 2"]
281pub type SWAP2_W<'a, const O: u8> = crate::BitWriter<'a, u32, WAVE_SPEC, bool, O>;
282#[doc = "Field `SWAP3` reader - Swap DTI Output Pair 3"]
283pub type SWAP3_R = crate::BitReader<bool>;
284#[doc = "Field `SWAP3` writer - Swap DTI Output Pair 3"]
285pub type SWAP3_W<'a, const O: u8> = crate::BitWriter<'a, u32, WAVE_SPEC, bool, O>;
286impl R {
287    #[doc = "Bits 0:2 - Waveform Generation"]
288    #[inline(always)]
289    pub fn wavegen(&self) -> WAVEGEN_R {
290        WAVEGEN_R::new((self.bits & 7) as u8)
291    }
292    #[doc = "Bits 4:5 - Ramp Mode"]
293    #[inline(always)]
294    pub fn ramp(&self) -> RAMP_R {
295        RAMP_R::new(((self.bits >> 4) & 3) as u8)
296    }
297    #[doc = "Bit 7 - Circular period Enable"]
298    #[inline(always)]
299    pub fn ciperen(&self) -> CIPEREN_R {
300        CIPEREN_R::new(((self.bits >> 7) & 1) != 0)
301    }
302    #[doc = "Bit 8 - Circular Channel 0 Enable"]
303    #[inline(always)]
304    pub fn ciccen0(&self) -> CICCEN0_R {
305        CICCEN0_R::new(((self.bits >> 8) & 1) != 0)
306    }
307    #[doc = "Bit 9 - Circular Channel 1 Enable"]
308    #[inline(always)]
309    pub fn ciccen1(&self) -> CICCEN1_R {
310        CICCEN1_R::new(((self.bits >> 9) & 1) != 0)
311    }
312    #[doc = "Bit 10 - Circular Channel 2 Enable"]
313    #[inline(always)]
314    pub fn ciccen2(&self) -> CICCEN2_R {
315        CICCEN2_R::new(((self.bits >> 10) & 1) != 0)
316    }
317    #[doc = "Bit 11 - Circular Channel 3 Enable"]
318    #[inline(always)]
319    pub fn ciccen3(&self) -> CICCEN3_R {
320        CICCEN3_R::new(((self.bits >> 11) & 1) != 0)
321    }
322    #[doc = "Bit 16 - Channel 0 Polarity"]
323    #[inline(always)]
324    pub fn pol0(&self) -> POL0_R {
325        POL0_R::new(((self.bits >> 16) & 1) != 0)
326    }
327    #[doc = "Bit 17 - Channel 1 Polarity"]
328    #[inline(always)]
329    pub fn pol1(&self) -> POL1_R {
330        POL1_R::new(((self.bits >> 17) & 1) != 0)
331    }
332    #[doc = "Bit 18 - Channel 2 Polarity"]
333    #[inline(always)]
334    pub fn pol2(&self) -> POL2_R {
335        POL2_R::new(((self.bits >> 18) & 1) != 0)
336    }
337    #[doc = "Bit 19 - Channel 3 Polarity"]
338    #[inline(always)]
339    pub fn pol3(&self) -> POL3_R {
340        POL3_R::new(((self.bits >> 19) & 1) != 0)
341    }
342    #[doc = "Bit 24 - Swap DTI Output Pair 0"]
343    #[inline(always)]
344    pub fn swap0(&self) -> SWAP0_R {
345        SWAP0_R::new(((self.bits >> 24) & 1) != 0)
346    }
347    #[doc = "Bit 25 - Swap DTI Output Pair 1"]
348    #[inline(always)]
349    pub fn swap1(&self) -> SWAP1_R {
350        SWAP1_R::new(((self.bits >> 25) & 1) != 0)
351    }
352    #[doc = "Bit 26 - Swap DTI Output Pair 2"]
353    #[inline(always)]
354    pub fn swap2(&self) -> SWAP2_R {
355        SWAP2_R::new(((self.bits >> 26) & 1) != 0)
356    }
357    #[doc = "Bit 27 - Swap DTI Output Pair 3"]
358    #[inline(always)]
359    pub fn swap3(&self) -> SWAP3_R {
360        SWAP3_R::new(((self.bits >> 27) & 1) != 0)
361    }
362}
363impl W {
364    #[doc = "Bits 0:2 - Waveform Generation"]
365    #[inline(always)]
366    #[must_use]
367    pub fn wavegen(&mut self) -> WAVEGEN_W<0> {
368        WAVEGEN_W::new(self)
369    }
370    #[doc = "Bits 4:5 - Ramp Mode"]
371    #[inline(always)]
372    #[must_use]
373    pub fn ramp(&mut self) -> RAMP_W<4> {
374        RAMP_W::new(self)
375    }
376    #[doc = "Bit 7 - Circular period Enable"]
377    #[inline(always)]
378    #[must_use]
379    pub fn ciperen(&mut self) -> CIPEREN_W<7> {
380        CIPEREN_W::new(self)
381    }
382    #[doc = "Bit 8 - Circular Channel 0 Enable"]
383    #[inline(always)]
384    #[must_use]
385    pub fn ciccen0(&mut self) -> CICCEN0_W<8> {
386        CICCEN0_W::new(self)
387    }
388    #[doc = "Bit 9 - Circular Channel 1 Enable"]
389    #[inline(always)]
390    #[must_use]
391    pub fn ciccen1(&mut self) -> CICCEN1_W<9> {
392        CICCEN1_W::new(self)
393    }
394    #[doc = "Bit 10 - Circular Channel 2 Enable"]
395    #[inline(always)]
396    #[must_use]
397    pub fn ciccen2(&mut self) -> CICCEN2_W<10> {
398        CICCEN2_W::new(self)
399    }
400    #[doc = "Bit 11 - Circular Channel 3 Enable"]
401    #[inline(always)]
402    #[must_use]
403    pub fn ciccen3(&mut self) -> CICCEN3_W<11> {
404        CICCEN3_W::new(self)
405    }
406    #[doc = "Bit 16 - Channel 0 Polarity"]
407    #[inline(always)]
408    #[must_use]
409    pub fn pol0(&mut self) -> POL0_W<16> {
410        POL0_W::new(self)
411    }
412    #[doc = "Bit 17 - Channel 1 Polarity"]
413    #[inline(always)]
414    #[must_use]
415    pub fn pol1(&mut self) -> POL1_W<17> {
416        POL1_W::new(self)
417    }
418    #[doc = "Bit 18 - Channel 2 Polarity"]
419    #[inline(always)]
420    #[must_use]
421    pub fn pol2(&mut self) -> POL2_W<18> {
422        POL2_W::new(self)
423    }
424    #[doc = "Bit 19 - Channel 3 Polarity"]
425    #[inline(always)]
426    #[must_use]
427    pub fn pol3(&mut self) -> POL3_W<19> {
428        POL3_W::new(self)
429    }
430    #[doc = "Bit 24 - Swap DTI Output Pair 0"]
431    #[inline(always)]
432    #[must_use]
433    pub fn swap0(&mut self) -> SWAP0_W<24> {
434        SWAP0_W::new(self)
435    }
436    #[doc = "Bit 25 - Swap DTI Output Pair 1"]
437    #[inline(always)]
438    #[must_use]
439    pub fn swap1(&mut self) -> SWAP1_W<25> {
440        SWAP1_W::new(self)
441    }
442    #[doc = "Bit 26 - Swap DTI Output Pair 2"]
443    #[inline(always)]
444    #[must_use]
445    pub fn swap2(&mut self) -> SWAP2_W<26> {
446        SWAP2_W::new(self)
447    }
448    #[doc = "Bit 27 - Swap DTI Output Pair 3"]
449    #[inline(always)]
450    #[must_use]
451    pub fn swap3(&mut self) -> SWAP3_W<27> {
452        SWAP3_W::new(self)
453    }
454    #[doc = "Writes raw bits to the register."]
455    #[inline(always)]
456    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
457        self.0.bits(bits);
458        self
459    }
460}
461#[doc = "Waveform Control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [wave](index.html) module"]
462pub struct WAVE_SPEC;
463impl crate::RegisterSpec for WAVE_SPEC {
464    type Ux = u32;
465}
466#[doc = "`read()` method returns [wave::R](R) reader structure"]
467impl crate::Readable for WAVE_SPEC {
468    type Reader = R;
469}
470#[doc = "`write(|w| ..)` method takes [wave::W](W) writer structure"]
471impl crate::Writable for WAVE_SPEC {
472    type Writer = W;
473    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
474    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
475}
476#[doc = "`reset()` method sets WAVE to value 0"]
477impl crate::Resettable for WAVE_SPEC {
478    const RESET_VALUE: Self::Ux = 0;
479}
atsaml21e17b/tcc0/wave.rs

atsaml21e17b/tcc0/
wave.rs
