Crate atsaml21e17b

Source
Expand description

Peripheral access API for ATSAML21E17B microcontrollers (generated using svd2rust v0.27.2 ( ))

You can find an overview of the generated API here.

API features to be included in the next svd2rust release can be generated by cloning the svd2rust repository, checking out the above commit, and running cargo doc --open.

Re-exports§

pub use self::port as port_iobus;
pub use self::sercom0 as sercom1;
pub use self::sercom0 as sercom2;
pub use self::sercom0 as sercom3;
pub use self::sercom0 as sercom4;
pub use self::sercom0 as sercom5;
pub use self::tc0 as tc1;
pub use self::tc0 as tc4;
pub use self::tcc0 as tcc1;
pub use self::tcc0 as tcc2;

Modules§

ac
Analog Comparators
adc
Analog Digital Converter
aes
Advanced Encryption Standard
ccl
Configurable Custom Logic
dac
Digital-to-Analog Converter
dmac
Direct Memory Access Controller
dsu
Device Service Unit
eic
External Interrupt Controller
evsys
Event System Interface
gclk
Generic Clock Generator
generic
Common register and bit access and modify traits
mclk
Main Clock
mtb
Cortex-M0+ Micro-Trace Buffer
nvmctrl
Non-Volatile Memory Controller
opamp
Operational Amplifier
osc32kctrl
32k Oscillators Control
oscctrl
Oscillators Control
pac
Peripheral Access Controller
pm
Power Manager
port
Port Module
rstc
Reset Controller
rtc
Real-Time Counter
sercom0
Serial Communication Interface 0
supc
Supply Controller
tc0
Basic Timer Counter 0
tcc0
Timer Counter Control 0
trng
True Random Generator
usb
Universal Serial Bus
wdt
Watchdog Timer

Structs§

AC
Analog Comparators
ADC
Analog Digital Converter
AES
Advanced Encryption Standard
CBP
Cache and branch predictor maintenance operations
CCL
Configurable Custom Logic
CPUID
CPUID
CorePeripherals
Core peripherals
DAC
Digital-to-Analog Converter
DCB
Debug Control Block
DMAC
Direct Memory Access Controller
DSU
Device Service Unit
DWT
Data Watchpoint and Trace unit
EIC
External Interrupt Controller
EVSYS
Event System Interface
FPB
Flash Patch and Breakpoint unit
GCLK
Generic Clock Generator
ITM
Instrumentation Trace Macrocell
MCLK
Main Clock
MPU
Memory Protection Unit
MTB
Cortex-M0+ Micro-Trace Buffer
NVIC
Nested Vector Interrupt Controller
NVMCTRL
Non-Volatile Memory Controller
OPAMP
Operational Amplifier
OSC32KCTRL
32k Oscillators Control
OSCCTRL
Oscillators Control
PAC
Peripheral Access Controller
PM
Power Manager
PORT
Port Module
PORT_IOBUS
Port Module (IOBUS)
Peripherals
All the peripherals.
RSTC
Reset Controller
RTC
Real-Time Counter
SCB
System Control Block
SERCOM0
Serial Communication Interface 0
SERCOM1
Serial Communication Interface 1
SERCOM2
Serial Communication Interface 2
SERCOM3
Serial Communication Interface 3
SERCOM4
Serial Communication Interface 4
SERCOM5
Serial Communication Interface 5
SUPC
Supply Controller
SYST
SysTick: System Timer
TC0
Basic Timer Counter 0
TC1
Basic Timer Counter 1
TC4
Basic Timer Counter 4
TCC0
Timer Counter Control 0
TCC1
Timer Counter Control 1
TCC2
Timer Counter Control 2
TPIU
Trace Port Interface Unit
TRNG
True Random Generator
USB
Universal Serial Bus
WDT
Watchdog Timer

Enums§

Interrupt
Enumeration of all the interrupts.

Constants§

NVIC_PRIO_BITS
Number available in the NVIC for configuring priority