Struct atsaml21e16b::dmac::RegisterBlock

source · 
#[repr(C)]
pub struct RegisterBlock {
Show 23 fields
    pub ctrl: CTRL,
    pub crcctrl: CRCCTRL,
    pub crcdatain: CRCDATAIN,
    pub crcchksum: CRCCHKSUM,
    pub crcstatus: CRCSTATUS,
    pub dbgctrl: DBGCTRL,
    pub qosctrl: QOSCTRL,
    pub swtrigctrl: SWTRIGCTRL,
    pub prictrl0: PRICTRL0,
    pub intpend: INTPEND,
    pub intstatus: INTSTATUS,
    pub busych: BUSYCH,
    pub pendch: PENDCH,
    pub active: ACTIVE,
    pub baseaddr: BASEADDR,
    pub wrbaddr: WRBADDR,
    pub chid: CHID,
    pub chctrla: CHCTRLA,
    pub chctrlb: CHCTRLB,
    pub chintenclr: CHINTENCLR,
    pub chintenset: CHINTENSET,
    pub chintflag: CHINTFLAG,
    pub chstatus: CHSTATUS,
    /* private fields */

}
Expand description

Register block

Fields§

§ctrl: CTRL

0x00 - Control

§crcctrl: CRCCTRL

0x02 - CRC Control

§crcdatain: CRCDATAIN

0x04 - CRC Data Input

§crcchksum: CRCCHKSUM

0x08 - CRC Checksum

§crcstatus: CRCSTATUS

0x0c - CRC Status

§dbgctrl: DBGCTRL

0x0d - Debug Control

§qosctrl: QOSCTRL

0x0e - QOS Control

§swtrigctrl: SWTRIGCTRL

0x10 - Software Trigger Control

§prictrl0: PRICTRL0

0x14 - Priority Control 0

§intpend: INTPEND

0x20 - Interrupt Pending

§intstatus: INTSTATUS

0x24 - Interrupt Status

§busych: BUSYCH

0x28 - Busy Channels

§pendch: PENDCH

0x2c - Pending Channels

§active: ACTIVE

0x30 - Active Channel and Levels

§baseaddr: BASEADDR

0x34 - Descriptor Memory Section Base Address

§wrbaddr: WRBADDR

0x38 - Write-Back Memory Section Base Address

§chid: CHID

0x3f - Channel ID

§chctrla: CHCTRLA

0x40 - Channel Control A

§chctrlb: CHCTRLB

0x44 - Channel Control B

§chintenclr: CHINTENCLR

0x4c - Channel Interrupt Enable Clear

§chintenset: CHINTENSET

0x4d - Channel Interrupt Enable Set

§chintflag: CHINTFLAG

0x4e - Channel Interrupt Flag Status and Clear

§chstatus: CHSTATUS

0x4f - Channel Status

Auto Trait Implementations§

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