atsaml21e16b/sercom0/spi/
ctrla.rs1#[doc = "Register `CTRLA` reader"]
2pub struct R(crate::R<CTRLA_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<CTRLA_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<CTRLA_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<CTRLA_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `CTRLA` writer"]
17pub struct W(crate::W<CTRLA_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<CTRLA_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<CTRLA_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<CTRLA_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `SWRST` reader - Software Reset"]
38pub type SWRST_R = crate::BitReader<bool>;
39#[doc = "Field `SWRST` writer - Software Reset"]
40pub type SWRST_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRLA_SPEC, bool, O>;
41#[doc = "Field `ENABLE` reader - Enable"]
42pub type ENABLE_R = crate::BitReader<bool>;
43#[doc = "Field `ENABLE` writer - Enable"]
44pub type ENABLE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRLA_SPEC, bool, O>;
45#[doc = "Field `MODE` reader - Operating Mode"]
46pub type MODE_R = crate::FieldReader<u8, u8>;
47#[doc = "Field `MODE` writer - Operating Mode"]
48pub type MODE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CTRLA_SPEC, u8, u8, 3, O>;
49#[doc = "Field `RUNSTDBY` reader - Run during Standby"]
50pub type RUNSTDBY_R = crate::BitReader<bool>;
51#[doc = "Field `RUNSTDBY` writer - Run during Standby"]
52pub type RUNSTDBY_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRLA_SPEC, bool, O>;
53#[doc = "Field `IBON` reader - Immediate Buffer Overflow Notification"]
54pub type IBON_R = crate::BitReader<bool>;
55#[doc = "Field `IBON` writer - Immediate Buffer Overflow Notification"]
56pub type IBON_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRLA_SPEC, bool, O>;
57#[doc = "Field `DOPO` reader - Data Out Pinout"]
58pub type DOPO_R = crate::FieldReader<u8, u8>;
59#[doc = "Field `DOPO` writer - Data Out Pinout"]
60pub type DOPO_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CTRLA_SPEC, u8, u8, 2, O>;
61#[doc = "Field `DIPO` reader - Data In Pinout"]
62pub type DIPO_R = crate::FieldReader<u8, u8>;
63#[doc = "Field `DIPO` writer - Data In Pinout"]
64pub type DIPO_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CTRLA_SPEC, u8, u8, 2, O>;
65#[doc = "Field `FORM` reader - Frame Format"]
66pub type FORM_R = crate::FieldReader<u8, u8>;
67#[doc = "Field `FORM` writer - Frame Format"]
68pub type FORM_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CTRLA_SPEC, u8, u8, 4, O>;
69#[doc = "Field `CPHA` reader - Clock Phase"]
70pub type CPHA_R = crate::BitReader<bool>;
71#[doc = "Field `CPHA` writer - Clock Phase"]
72pub type CPHA_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRLA_SPEC, bool, O>;
73#[doc = "Field `CPOL` reader - Clock Polarity"]
74pub type CPOL_R = crate::BitReader<bool>;
75#[doc = "Field `CPOL` writer - Clock Polarity"]
76pub type CPOL_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRLA_SPEC, bool, O>;
77#[doc = "Field `DORD` reader - Data Order"]
78pub type DORD_R = crate::BitReader<bool>;
79#[doc = "Field `DORD` writer - Data Order"]
80pub type DORD_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRLA_SPEC, bool, O>;
81impl R {
82 #[doc = "Bit 0 - Software Reset"]
83 #[inline(always)]
84 pub fn swrst(&self) -> SWRST_R {
85 SWRST_R::new((self.bits & 1) != 0)
86 }
87 #[doc = "Bit 1 - Enable"]
88 #[inline(always)]
89 pub fn enable(&self) -> ENABLE_R {
90 ENABLE_R::new(((self.bits >> 1) & 1) != 0)
91 }
92 #[doc = "Bits 2:4 - Operating Mode"]
93 #[inline(always)]
94 pub fn mode(&self) -> MODE_R {
95 MODE_R::new(((self.bits >> 2) & 7) as u8)
96 }
97 #[doc = "Bit 7 - Run during Standby"]
98 #[inline(always)]
99 pub fn runstdby(&self) -> RUNSTDBY_R {
100 RUNSTDBY_R::new(((self.bits >> 7) & 1) != 0)
101 }
102 #[doc = "Bit 8 - Immediate Buffer Overflow Notification"]
103 #[inline(always)]
104 pub fn ibon(&self) -> IBON_R {
105 IBON_R::new(((self.bits >> 8) & 1) != 0)
106 }
107 #[doc = "Bits 16:17 - Data Out Pinout"]
108 #[inline(always)]
109 pub fn dopo(&self) -> DOPO_R {
110 DOPO_R::new(((self.bits >> 16) & 3) as u8)
111 }
112 #[doc = "Bits 20:21 - Data In Pinout"]
113 #[inline(always)]
114 pub fn dipo(&self) -> DIPO_R {
115 DIPO_R::new(((self.bits >> 20) & 3) as u8)
116 }
117 #[doc = "Bits 24:27 - Frame Format"]
118 #[inline(always)]
119 pub fn form(&self) -> FORM_R {
120 FORM_R::new(((self.bits >> 24) & 0x0f) as u8)
121 }
122 #[doc = "Bit 28 - Clock Phase"]
123 #[inline(always)]
124 pub fn cpha(&self) -> CPHA_R {
125 CPHA_R::new(((self.bits >> 28) & 1) != 0)
126 }
127 #[doc = "Bit 29 - Clock Polarity"]
128 #[inline(always)]
129 pub fn cpol(&self) -> CPOL_R {
130 CPOL_R::new(((self.bits >> 29) & 1) != 0)
131 }
132 #[doc = "Bit 30 - Data Order"]
133 #[inline(always)]
134 pub fn dord(&self) -> DORD_R {
135 DORD_R::new(((self.bits >> 30) & 1) != 0)
136 }
137}
138impl W {
139 #[doc = "Bit 0 - Software Reset"]
140 #[inline(always)]
141 #[must_use]
142 pub fn swrst(&mut self) -> SWRST_W<0> {
143 SWRST_W::new(self)
144 }
145 #[doc = "Bit 1 - Enable"]
146 #[inline(always)]
147 #[must_use]
148 pub fn enable(&mut self) -> ENABLE_W<1> {
149 ENABLE_W::new(self)
150 }
151 #[doc = "Bits 2:4 - Operating Mode"]
152 #[inline(always)]
153 #[must_use]
154 pub fn mode(&mut self) -> MODE_W<2> {
155 MODE_W::new(self)
156 }
157 #[doc = "Bit 7 - Run during Standby"]
158 #[inline(always)]
159 #[must_use]
160 pub fn runstdby(&mut self) -> RUNSTDBY_W<7> {
161 RUNSTDBY_W::new(self)
162 }
163 #[doc = "Bit 8 - Immediate Buffer Overflow Notification"]
164 #[inline(always)]
165 #[must_use]
166 pub fn ibon(&mut self) -> IBON_W<8> {
167 IBON_W::new(self)
168 }
169 #[doc = "Bits 16:17 - Data Out Pinout"]
170 #[inline(always)]
171 #[must_use]
172 pub fn dopo(&mut self) -> DOPO_W<16> {
173 DOPO_W::new(self)
174 }
175 #[doc = "Bits 20:21 - Data In Pinout"]
176 #[inline(always)]
177 #[must_use]
178 pub fn dipo(&mut self) -> DIPO_W<20> {
179 DIPO_W::new(self)
180 }
181 #[doc = "Bits 24:27 - Frame Format"]
182 #[inline(always)]
183 #[must_use]
184 pub fn form(&mut self) -> FORM_W<24> {
185 FORM_W::new(self)
186 }
187 #[doc = "Bit 28 - Clock Phase"]
188 #[inline(always)]
189 #[must_use]
190 pub fn cpha(&mut self) -> CPHA_W<28> {
191 CPHA_W::new(self)
192 }
193 #[doc = "Bit 29 - Clock Polarity"]
194 #[inline(always)]
195 #[must_use]
196 pub fn cpol(&mut self) -> CPOL_W<29> {
197 CPOL_W::new(self)
198 }
199 #[doc = "Bit 30 - Data Order"]
200 #[inline(always)]
201 #[must_use]
202 pub fn dord(&mut self) -> DORD_W<30> {
203 DORD_W::new(self)
204 }
205 #[doc = "Writes raw bits to the register."]
206 #[inline(always)]
207 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
208 self.0.bits(bits);
209 self
210 }
211}
212#[doc = "SPI Control A\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrla](index.html) module"]
213pub struct CTRLA_SPEC;
214impl crate::RegisterSpec for CTRLA_SPEC {
215 type Ux = u32;
216}
217#[doc = "`read()` method returns [ctrla::R](R) reader structure"]
218impl crate::Readable for CTRLA_SPEC {
219 type Reader = R;
220}
221#[doc = "`write(|w| ..)` method takes [ctrla::W](W) writer structure"]
222impl crate::Writable for CTRLA_SPEC {
223 type Writer = W;
224 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
225 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
226}
227#[doc = "`reset()` method sets CTRLA to value 0"]
228impl crate::Resettable for CTRLA_SPEC {
229 const RESET_VALUE: Self::Ux = 0;
230}