Crate atsaml21e16b
source ·Expand description
Peripheral access API for ATSAML21E16B microcontrollers (generated using svd2rust v0.27.2 ( ))
You can find an overview of the generated API here.
API features to be included in the next
svd2rust release can be generated by cloning the svd2rust repository, checking out the above commit, and running cargo doc --open.
Re-exports
pub use self::port as port_iobus;pub use self::sercom0 as sercom1;pub use self::sercom0 as sercom2;pub use self::sercom0 as sercom3;pub use self::sercom0 as sercom4;pub use self::sercom0 as sercom5;pub use self::tc0 as tc1;pub use self::tc0 as tc4;pub use self::tcc0 as tcc1;pub use self::tcc0 as tcc2;Modules
Analog Comparators
Analog Digital Converter
Advanced Encryption Standard
Configurable Custom Logic
Digital-to-Analog Converter
Direct Memory Access Controller
Device Service Unit
External Interrupt Controller
Event System Interface
Generic Clock Generator
Common register and bit access and modify traits
Main Clock
Cortex-M0+ Micro-Trace Buffer
Non-Volatile Memory Controller
Operational Amplifier
32k Oscillators Control
Oscillators Control
Peripheral Access Controller
Power Manager
Port Module
Reset Controller
Real-Time Counter
Serial Communication Interface 0
Supply Controller
Basic Timer Counter 0
Timer Counter Control 0
True Random Generator
Universal Serial Bus
Watchdog Timer
Structs
Analog Comparators
Analog Digital Converter
Advanced Encryption Standard
Cache and branch predictor maintenance operations
Configurable Custom Logic
CPUID
Core peripherals
Digital-to-Analog Converter
Debug Control Block
Direct Memory Access Controller
Device Service Unit
Data Watchpoint and Trace unit
External Interrupt Controller
Event System Interface
Flash Patch and Breakpoint unit
Generic Clock Generator
Instrumentation Trace Macrocell
Main Clock
Memory Protection Unit
Cortex-M0+ Micro-Trace Buffer
Nested Vector Interrupt Controller
Non-Volatile Memory Controller
Operational Amplifier
32k Oscillators Control
Oscillators Control
Peripheral Access Controller
Power Manager
Port Module
Port Module (IOBUS)
All the peripherals.
Reset Controller
Real-Time Counter
System Control Block
Serial Communication Interface 0
Serial Communication Interface 1
Serial Communication Interface 2
Serial Communication Interface 3
Serial Communication Interface 4
Serial Communication Interface 5
Supply Controller
SysTick: System Timer
Basic Timer Counter 0
Basic Timer Counter 1
Basic Timer Counter 4
Timer Counter Control 0
Timer Counter Control 1
Timer Counter Control 2
Trace Port Interface Unit
True Random Generator
Universal Serial Bus
Watchdog Timer
Enums
Enumeration of all the interrupts.
Constants
Number available in the NVIC for configuring priority