atsame70q21/mcan0/
mcan_ils.rs

1#[doc = "Register `MCAN_ILS` reader"]
2pub struct R(crate::R<MCAN_ILS_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<MCAN_ILS_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<MCAN_ILS_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<MCAN_ILS_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `MCAN_ILS` writer"]
17pub struct W(crate::W<MCAN_ILS_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<MCAN_ILS_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<MCAN_ILS_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<MCAN_ILS_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `RF0NL` reader - Receive FIFO 0 New Message Interrupt Line"]
38pub struct RF0NL_R(crate::FieldReader<bool, bool>);
39impl RF0NL_R {
40    #[inline(always)]
41    pub(crate) fn new(bits: bool) -> Self {
42        RF0NL_R(crate::FieldReader::new(bits))
43    }
44}
45impl core::ops::Deref for RF0NL_R {
46    type Target = crate::FieldReader<bool, bool>;
47    #[inline(always)]
48    fn deref(&self) -> &Self::Target {
49        &self.0
50    }
51}
52#[doc = "Field `RF0NL` writer - Receive FIFO 0 New Message Interrupt Line"]
53pub struct RF0NL_W<'a> {
54    w: &'a mut W,
55}
56impl<'a> RF0NL_W<'a> {
57    #[doc = r"Sets the field bit"]
58    #[inline(always)]
59    pub fn set_bit(self) -> &'a mut W {
60        self.bit(true)
61    }
62    #[doc = r"Clears the field bit"]
63    #[inline(always)]
64    pub fn clear_bit(self) -> &'a mut W {
65        self.bit(false)
66    }
67    #[doc = r"Writes raw bits to the field"]
68    #[inline(always)]
69    pub fn bit(self, value: bool) -> &'a mut W {
70        self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01);
71        self.w
72    }
73}
74#[doc = "Field `RF0WL` reader - Receive FIFO 0 Watermark Reached Interrupt Line"]
75pub struct RF0WL_R(crate::FieldReader<bool, bool>);
76impl RF0WL_R {
77    #[inline(always)]
78    pub(crate) fn new(bits: bool) -> Self {
79        RF0WL_R(crate::FieldReader::new(bits))
80    }
81}
82impl core::ops::Deref for RF0WL_R {
83    type Target = crate::FieldReader<bool, bool>;
84    #[inline(always)]
85    fn deref(&self) -> &Self::Target {
86        &self.0
87    }
88}
89#[doc = "Field `RF0WL` writer - Receive FIFO 0 Watermark Reached Interrupt Line"]
90pub struct RF0WL_W<'a> {
91    w: &'a mut W,
92}
93impl<'a> RF0WL_W<'a> {
94    #[doc = r"Sets the field bit"]
95    #[inline(always)]
96    pub fn set_bit(self) -> &'a mut W {
97        self.bit(true)
98    }
99    #[doc = r"Clears the field bit"]
100    #[inline(always)]
101    pub fn clear_bit(self) -> &'a mut W {
102        self.bit(false)
103    }
104    #[doc = r"Writes raw bits to the field"]
105    #[inline(always)]
106    pub fn bit(self, value: bool) -> &'a mut W {
107        self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1);
108        self.w
109    }
110}
111#[doc = "Field `RF0FL` reader - Receive FIFO 0 Full Interrupt Line"]
112pub struct RF0FL_R(crate::FieldReader<bool, bool>);
113impl RF0FL_R {
114    #[inline(always)]
115    pub(crate) fn new(bits: bool) -> Self {
116        RF0FL_R(crate::FieldReader::new(bits))
117    }
118}
119impl core::ops::Deref for RF0FL_R {
120    type Target = crate::FieldReader<bool, bool>;
121    #[inline(always)]
122    fn deref(&self) -> &Self::Target {
123        &self.0
124    }
125}
126#[doc = "Field `RF0FL` writer - Receive FIFO 0 Full Interrupt Line"]
127pub struct RF0FL_W<'a> {
128    w: &'a mut W,
129}
130impl<'a> RF0FL_W<'a> {
131    #[doc = r"Sets the field bit"]
132    #[inline(always)]
133    pub fn set_bit(self) -> &'a mut W {
134        self.bit(true)
135    }
136    #[doc = r"Clears the field bit"]
137    #[inline(always)]
138    pub fn clear_bit(self) -> &'a mut W {
139        self.bit(false)
140    }
141    #[doc = r"Writes raw bits to the field"]
142    #[inline(always)]
143    pub fn bit(self, value: bool) -> &'a mut W {
144        self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2);
145        self.w
146    }
147}
148#[doc = "Field `RF0LL` reader - Receive FIFO 0 Message Lost Interrupt Line"]
149pub struct RF0LL_R(crate::FieldReader<bool, bool>);
150impl RF0LL_R {
151    #[inline(always)]
152    pub(crate) fn new(bits: bool) -> Self {
153        RF0LL_R(crate::FieldReader::new(bits))
154    }
155}
156impl core::ops::Deref for RF0LL_R {
157    type Target = crate::FieldReader<bool, bool>;
158    #[inline(always)]
159    fn deref(&self) -> &Self::Target {
160        &self.0
161    }
162}
163#[doc = "Field `RF0LL` writer - Receive FIFO 0 Message Lost Interrupt Line"]
164pub struct RF0LL_W<'a> {
165    w: &'a mut W,
166}
167impl<'a> RF0LL_W<'a> {
168    #[doc = r"Sets the field bit"]
169    #[inline(always)]
170    pub fn set_bit(self) -> &'a mut W {
171        self.bit(true)
172    }
173    #[doc = r"Clears the field bit"]
174    #[inline(always)]
175    pub fn clear_bit(self) -> &'a mut W {
176        self.bit(false)
177    }
178    #[doc = r"Writes raw bits to the field"]
179    #[inline(always)]
180    pub fn bit(self, value: bool) -> &'a mut W {
181        self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3);
182        self.w
183    }
184}
185#[doc = "Field `RF1NL` reader - Receive FIFO 1 New Message Interrupt Line"]
186pub struct RF1NL_R(crate::FieldReader<bool, bool>);
187impl RF1NL_R {
188    #[inline(always)]
189    pub(crate) fn new(bits: bool) -> Self {
190        RF1NL_R(crate::FieldReader::new(bits))
191    }
192}
193impl core::ops::Deref for RF1NL_R {
194    type Target = crate::FieldReader<bool, bool>;
195    #[inline(always)]
196    fn deref(&self) -> &Self::Target {
197        &self.0
198    }
199}
200#[doc = "Field `RF1NL` writer - Receive FIFO 1 New Message Interrupt Line"]
201pub struct RF1NL_W<'a> {
202    w: &'a mut W,
203}
204impl<'a> RF1NL_W<'a> {
205    #[doc = r"Sets the field bit"]
206    #[inline(always)]
207    pub fn set_bit(self) -> &'a mut W {
208        self.bit(true)
209    }
210    #[doc = r"Clears the field bit"]
211    #[inline(always)]
212    pub fn clear_bit(self) -> &'a mut W {
213        self.bit(false)
214    }
215    #[doc = r"Writes raw bits to the field"]
216    #[inline(always)]
217    pub fn bit(self, value: bool) -> &'a mut W {
218        self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4);
219        self.w
220    }
221}
222#[doc = "Field `RF1WL` reader - Receive FIFO 1 Watermark Reached Interrupt Line"]
223pub struct RF1WL_R(crate::FieldReader<bool, bool>);
224impl RF1WL_R {
225    #[inline(always)]
226    pub(crate) fn new(bits: bool) -> Self {
227        RF1WL_R(crate::FieldReader::new(bits))
228    }
229}
230impl core::ops::Deref for RF1WL_R {
231    type Target = crate::FieldReader<bool, bool>;
232    #[inline(always)]
233    fn deref(&self) -> &Self::Target {
234        &self.0
235    }
236}
237#[doc = "Field `RF1WL` writer - Receive FIFO 1 Watermark Reached Interrupt Line"]
238pub struct RF1WL_W<'a> {
239    w: &'a mut W,
240}
241impl<'a> RF1WL_W<'a> {
242    #[doc = r"Sets the field bit"]
243    #[inline(always)]
244    pub fn set_bit(self) -> &'a mut W {
245        self.bit(true)
246    }
247    #[doc = r"Clears the field bit"]
248    #[inline(always)]
249    pub fn clear_bit(self) -> &'a mut W {
250        self.bit(false)
251    }
252    #[doc = r"Writes raw bits to the field"]
253    #[inline(always)]
254    pub fn bit(self, value: bool) -> &'a mut W {
255        self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5);
256        self.w
257    }
258}
259#[doc = "Field `RF1FL` reader - Receive FIFO 1 Full Interrupt Line"]
260pub struct RF1FL_R(crate::FieldReader<bool, bool>);
261impl RF1FL_R {
262    #[inline(always)]
263    pub(crate) fn new(bits: bool) -> Self {
264        RF1FL_R(crate::FieldReader::new(bits))
265    }
266}
267impl core::ops::Deref for RF1FL_R {
268    type Target = crate::FieldReader<bool, bool>;
269    #[inline(always)]
270    fn deref(&self) -> &Self::Target {
271        &self.0
272    }
273}
274#[doc = "Field `RF1FL` writer - Receive FIFO 1 Full Interrupt Line"]
275pub struct RF1FL_W<'a> {
276    w: &'a mut W,
277}
278impl<'a> RF1FL_W<'a> {
279    #[doc = r"Sets the field bit"]
280    #[inline(always)]
281    pub fn set_bit(self) -> &'a mut W {
282        self.bit(true)
283    }
284    #[doc = r"Clears the field bit"]
285    #[inline(always)]
286    pub fn clear_bit(self) -> &'a mut W {
287        self.bit(false)
288    }
289    #[doc = r"Writes raw bits to the field"]
290    #[inline(always)]
291    pub fn bit(self, value: bool) -> &'a mut W {
292        self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6);
293        self.w
294    }
295}
296#[doc = "Field `RF1LL` reader - Receive FIFO 1 Message Lost Interrupt Line"]
297pub struct RF1LL_R(crate::FieldReader<bool, bool>);
298impl RF1LL_R {
299    #[inline(always)]
300    pub(crate) fn new(bits: bool) -> Self {
301        RF1LL_R(crate::FieldReader::new(bits))
302    }
303}
304impl core::ops::Deref for RF1LL_R {
305    type Target = crate::FieldReader<bool, bool>;
306    #[inline(always)]
307    fn deref(&self) -> &Self::Target {
308        &self.0
309    }
310}
311#[doc = "Field `RF1LL` writer - Receive FIFO 1 Message Lost Interrupt Line"]
312pub struct RF1LL_W<'a> {
313    w: &'a mut W,
314}
315impl<'a> RF1LL_W<'a> {
316    #[doc = r"Sets the field bit"]
317    #[inline(always)]
318    pub fn set_bit(self) -> &'a mut W {
319        self.bit(true)
320    }
321    #[doc = r"Clears the field bit"]
322    #[inline(always)]
323    pub fn clear_bit(self) -> &'a mut W {
324        self.bit(false)
325    }
326    #[doc = r"Writes raw bits to the field"]
327    #[inline(always)]
328    pub fn bit(self, value: bool) -> &'a mut W {
329        self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7);
330        self.w
331    }
332}
333#[doc = "Field `HPML` reader - High Priority Message Interrupt Line"]
334pub struct HPML_R(crate::FieldReader<bool, bool>);
335impl HPML_R {
336    #[inline(always)]
337    pub(crate) fn new(bits: bool) -> Self {
338        HPML_R(crate::FieldReader::new(bits))
339    }
340}
341impl core::ops::Deref for HPML_R {
342    type Target = crate::FieldReader<bool, bool>;
343    #[inline(always)]
344    fn deref(&self) -> &Self::Target {
345        &self.0
346    }
347}
348#[doc = "Field `HPML` writer - High Priority Message Interrupt Line"]
349pub struct HPML_W<'a> {
350    w: &'a mut W,
351}
352impl<'a> HPML_W<'a> {
353    #[doc = r"Sets the field bit"]
354    #[inline(always)]
355    pub fn set_bit(self) -> &'a mut W {
356        self.bit(true)
357    }
358    #[doc = r"Clears the field bit"]
359    #[inline(always)]
360    pub fn clear_bit(self) -> &'a mut W {
361        self.bit(false)
362    }
363    #[doc = r"Writes raw bits to the field"]
364    #[inline(always)]
365    pub fn bit(self, value: bool) -> &'a mut W {
366        self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8);
367        self.w
368    }
369}
370#[doc = "Field `TCL` reader - Transmission Completed Interrupt Line"]
371pub struct TCL_R(crate::FieldReader<bool, bool>);
372impl TCL_R {
373    #[inline(always)]
374    pub(crate) fn new(bits: bool) -> Self {
375        TCL_R(crate::FieldReader::new(bits))
376    }
377}
378impl core::ops::Deref for TCL_R {
379    type Target = crate::FieldReader<bool, bool>;
380    #[inline(always)]
381    fn deref(&self) -> &Self::Target {
382        &self.0
383    }
384}
385#[doc = "Field `TCL` writer - Transmission Completed Interrupt Line"]
386pub struct TCL_W<'a> {
387    w: &'a mut W,
388}
389impl<'a> TCL_W<'a> {
390    #[doc = r"Sets the field bit"]
391    #[inline(always)]
392    pub fn set_bit(self) -> &'a mut W {
393        self.bit(true)
394    }
395    #[doc = r"Clears the field bit"]
396    #[inline(always)]
397    pub fn clear_bit(self) -> &'a mut W {
398        self.bit(false)
399    }
400    #[doc = r"Writes raw bits to the field"]
401    #[inline(always)]
402    pub fn bit(self, value: bool) -> &'a mut W {
403        self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9);
404        self.w
405    }
406}
407#[doc = "Field `TCFL` reader - Transmission Cancellation Finished Interrupt Line"]
408pub struct TCFL_R(crate::FieldReader<bool, bool>);
409impl TCFL_R {
410    #[inline(always)]
411    pub(crate) fn new(bits: bool) -> Self {
412        TCFL_R(crate::FieldReader::new(bits))
413    }
414}
415impl core::ops::Deref for TCFL_R {
416    type Target = crate::FieldReader<bool, bool>;
417    #[inline(always)]
418    fn deref(&self) -> &Self::Target {
419        &self.0
420    }
421}
422#[doc = "Field `TCFL` writer - Transmission Cancellation Finished Interrupt Line"]
423pub struct TCFL_W<'a> {
424    w: &'a mut W,
425}
426impl<'a> TCFL_W<'a> {
427    #[doc = r"Sets the field bit"]
428    #[inline(always)]
429    pub fn set_bit(self) -> &'a mut W {
430        self.bit(true)
431    }
432    #[doc = r"Clears the field bit"]
433    #[inline(always)]
434    pub fn clear_bit(self) -> &'a mut W {
435        self.bit(false)
436    }
437    #[doc = r"Writes raw bits to the field"]
438    #[inline(always)]
439    pub fn bit(self, value: bool) -> &'a mut W {
440        self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10);
441        self.w
442    }
443}
444#[doc = "Field `TFEL` reader - Tx FIFO Empty Interrupt Line"]
445pub struct TFEL_R(crate::FieldReader<bool, bool>);
446impl TFEL_R {
447    #[inline(always)]
448    pub(crate) fn new(bits: bool) -> Self {
449        TFEL_R(crate::FieldReader::new(bits))
450    }
451}
452impl core::ops::Deref for TFEL_R {
453    type Target = crate::FieldReader<bool, bool>;
454    #[inline(always)]
455    fn deref(&self) -> &Self::Target {
456        &self.0
457    }
458}
459#[doc = "Field `TFEL` writer - Tx FIFO Empty Interrupt Line"]
460pub struct TFEL_W<'a> {
461    w: &'a mut W,
462}
463impl<'a> TFEL_W<'a> {
464    #[doc = r"Sets the field bit"]
465    #[inline(always)]
466    pub fn set_bit(self) -> &'a mut W {
467        self.bit(true)
468    }
469    #[doc = r"Clears the field bit"]
470    #[inline(always)]
471    pub fn clear_bit(self) -> &'a mut W {
472        self.bit(false)
473    }
474    #[doc = r"Writes raw bits to the field"]
475    #[inline(always)]
476    pub fn bit(self, value: bool) -> &'a mut W {
477        self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11);
478        self.w
479    }
480}
481#[doc = "Field `TEFNL` reader - Tx Event FIFO New Entry Interrupt Line"]
482pub struct TEFNL_R(crate::FieldReader<bool, bool>);
483impl TEFNL_R {
484    #[inline(always)]
485    pub(crate) fn new(bits: bool) -> Self {
486        TEFNL_R(crate::FieldReader::new(bits))
487    }
488}
489impl core::ops::Deref for TEFNL_R {
490    type Target = crate::FieldReader<bool, bool>;
491    #[inline(always)]
492    fn deref(&self) -> &Self::Target {
493        &self.0
494    }
495}
496#[doc = "Field `TEFNL` writer - Tx Event FIFO New Entry Interrupt Line"]
497pub struct TEFNL_W<'a> {
498    w: &'a mut W,
499}
500impl<'a> TEFNL_W<'a> {
501    #[doc = r"Sets the field bit"]
502    #[inline(always)]
503    pub fn set_bit(self) -> &'a mut W {
504        self.bit(true)
505    }
506    #[doc = r"Clears the field bit"]
507    #[inline(always)]
508    pub fn clear_bit(self) -> &'a mut W {
509        self.bit(false)
510    }
511    #[doc = r"Writes raw bits to the field"]
512    #[inline(always)]
513    pub fn bit(self, value: bool) -> &'a mut W {
514        self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12);
515        self.w
516    }
517}
518#[doc = "Field `TEFWL` reader - Tx Event FIFO Watermark Reached Interrupt Line"]
519pub struct TEFWL_R(crate::FieldReader<bool, bool>);
520impl TEFWL_R {
521    #[inline(always)]
522    pub(crate) fn new(bits: bool) -> Self {
523        TEFWL_R(crate::FieldReader::new(bits))
524    }
525}
526impl core::ops::Deref for TEFWL_R {
527    type Target = crate::FieldReader<bool, bool>;
528    #[inline(always)]
529    fn deref(&self) -> &Self::Target {
530        &self.0
531    }
532}
533#[doc = "Field `TEFWL` writer - Tx Event FIFO Watermark Reached Interrupt Line"]
534pub struct TEFWL_W<'a> {
535    w: &'a mut W,
536}
537impl<'a> TEFWL_W<'a> {
538    #[doc = r"Sets the field bit"]
539    #[inline(always)]
540    pub fn set_bit(self) -> &'a mut W {
541        self.bit(true)
542    }
543    #[doc = r"Clears the field bit"]
544    #[inline(always)]
545    pub fn clear_bit(self) -> &'a mut W {
546        self.bit(false)
547    }
548    #[doc = r"Writes raw bits to the field"]
549    #[inline(always)]
550    pub fn bit(self, value: bool) -> &'a mut W {
551        self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13);
552        self.w
553    }
554}
555#[doc = "Field `TEFFL` reader - Tx Event FIFO Full Interrupt Line"]
556pub struct TEFFL_R(crate::FieldReader<bool, bool>);
557impl TEFFL_R {
558    #[inline(always)]
559    pub(crate) fn new(bits: bool) -> Self {
560        TEFFL_R(crate::FieldReader::new(bits))
561    }
562}
563impl core::ops::Deref for TEFFL_R {
564    type Target = crate::FieldReader<bool, bool>;
565    #[inline(always)]
566    fn deref(&self) -> &Self::Target {
567        &self.0
568    }
569}
570#[doc = "Field `TEFFL` writer - Tx Event FIFO Full Interrupt Line"]
571pub struct TEFFL_W<'a> {
572    w: &'a mut W,
573}
574impl<'a> TEFFL_W<'a> {
575    #[doc = r"Sets the field bit"]
576    #[inline(always)]
577    pub fn set_bit(self) -> &'a mut W {
578        self.bit(true)
579    }
580    #[doc = r"Clears the field bit"]
581    #[inline(always)]
582    pub fn clear_bit(self) -> &'a mut W {
583        self.bit(false)
584    }
585    #[doc = r"Writes raw bits to the field"]
586    #[inline(always)]
587    pub fn bit(self, value: bool) -> &'a mut W {
588        self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14);
589        self.w
590    }
591}
592#[doc = "Field `TEFLL` reader - Tx Event FIFO Event Lost Interrupt Line"]
593pub struct TEFLL_R(crate::FieldReader<bool, bool>);
594impl TEFLL_R {
595    #[inline(always)]
596    pub(crate) fn new(bits: bool) -> Self {
597        TEFLL_R(crate::FieldReader::new(bits))
598    }
599}
600impl core::ops::Deref for TEFLL_R {
601    type Target = crate::FieldReader<bool, bool>;
602    #[inline(always)]
603    fn deref(&self) -> &Self::Target {
604        &self.0
605    }
606}
607#[doc = "Field `TEFLL` writer - Tx Event FIFO Event Lost Interrupt Line"]
608pub struct TEFLL_W<'a> {
609    w: &'a mut W,
610}
611impl<'a> TEFLL_W<'a> {
612    #[doc = r"Sets the field bit"]
613    #[inline(always)]
614    pub fn set_bit(self) -> &'a mut W {
615        self.bit(true)
616    }
617    #[doc = r"Clears the field bit"]
618    #[inline(always)]
619    pub fn clear_bit(self) -> &'a mut W {
620        self.bit(false)
621    }
622    #[doc = r"Writes raw bits to the field"]
623    #[inline(always)]
624    pub fn bit(self, value: bool) -> &'a mut W {
625        self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15);
626        self.w
627    }
628}
629#[doc = "Field `TSWL` reader - Timestamp Wraparound Interrupt Line"]
630pub struct TSWL_R(crate::FieldReader<bool, bool>);
631impl TSWL_R {
632    #[inline(always)]
633    pub(crate) fn new(bits: bool) -> Self {
634        TSWL_R(crate::FieldReader::new(bits))
635    }
636}
637impl core::ops::Deref for TSWL_R {
638    type Target = crate::FieldReader<bool, bool>;
639    #[inline(always)]
640    fn deref(&self) -> &Self::Target {
641        &self.0
642    }
643}
644#[doc = "Field `TSWL` writer - Timestamp Wraparound Interrupt Line"]
645pub struct TSWL_W<'a> {
646    w: &'a mut W,
647}
648impl<'a> TSWL_W<'a> {
649    #[doc = r"Sets the field bit"]
650    #[inline(always)]
651    pub fn set_bit(self) -> &'a mut W {
652        self.bit(true)
653    }
654    #[doc = r"Clears the field bit"]
655    #[inline(always)]
656    pub fn clear_bit(self) -> &'a mut W {
657        self.bit(false)
658    }
659    #[doc = r"Writes raw bits to the field"]
660    #[inline(always)]
661    pub fn bit(self, value: bool) -> &'a mut W {
662        self.w.bits = (self.w.bits & !(0x01 << 16)) | ((value as u32 & 0x01) << 16);
663        self.w
664    }
665}
666#[doc = "Field `MRAFL` reader - Message RAM Access Failure Interrupt Line"]
667pub struct MRAFL_R(crate::FieldReader<bool, bool>);
668impl MRAFL_R {
669    #[inline(always)]
670    pub(crate) fn new(bits: bool) -> Self {
671        MRAFL_R(crate::FieldReader::new(bits))
672    }
673}
674impl core::ops::Deref for MRAFL_R {
675    type Target = crate::FieldReader<bool, bool>;
676    #[inline(always)]
677    fn deref(&self) -> &Self::Target {
678        &self.0
679    }
680}
681#[doc = "Field `MRAFL` writer - Message RAM Access Failure Interrupt Line"]
682pub struct MRAFL_W<'a> {
683    w: &'a mut W,
684}
685impl<'a> MRAFL_W<'a> {
686    #[doc = r"Sets the field bit"]
687    #[inline(always)]
688    pub fn set_bit(self) -> &'a mut W {
689        self.bit(true)
690    }
691    #[doc = r"Clears the field bit"]
692    #[inline(always)]
693    pub fn clear_bit(self) -> &'a mut W {
694        self.bit(false)
695    }
696    #[doc = r"Writes raw bits to the field"]
697    #[inline(always)]
698    pub fn bit(self, value: bool) -> &'a mut W {
699        self.w.bits = (self.w.bits & !(0x01 << 17)) | ((value as u32 & 0x01) << 17);
700        self.w
701    }
702}
703#[doc = "Field `TOOL` reader - Timeout Occurred Interrupt Line"]
704pub struct TOOL_R(crate::FieldReader<bool, bool>);
705impl TOOL_R {
706    #[inline(always)]
707    pub(crate) fn new(bits: bool) -> Self {
708        TOOL_R(crate::FieldReader::new(bits))
709    }
710}
711impl core::ops::Deref for TOOL_R {
712    type Target = crate::FieldReader<bool, bool>;
713    #[inline(always)]
714    fn deref(&self) -> &Self::Target {
715        &self.0
716    }
717}
718#[doc = "Field `TOOL` writer - Timeout Occurred Interrupt Line"]
719pub struct TOOL_W<'a> {
720    w: &'a mut W,
721}
722impl<'a> TOOL_W<'a> {
723    #[doc = r"Sets the field bit"]
724    #[inline(always)]
725    pub fn set_bit(self) -> &'a mut W {
726        self.bit(true)
727    }
728    #[doc = r"Clears the field bit"]
729    #[inline(always)]
730    pub fn clear_bit(self) -> &'a mut W {
731        self.bit(false)
732    }
733    #[doc = r"Writes raw bits to the field"]
734    #[inline(always)]
735    pub fn bit(self, value: bool) -> &'a mut W {
736        self.w.bits = (self.w.bits & !(0x01 << 18)) | ((value as u32 & 0x01) << 18);
737        self.w
738    }
739}
740#[doc = "Field `DRXL` reader - Message stored to Dedicated Receive Buffer Interrupt Line"]
741pub struct DRXL_R(crate::FieldReader<bool, bool>);
742impl DRXL_R {
743    #[inline(always)]
744    pub(crate) fn new(bits: bool) -> Self {
745        DRXL_R(crate::FieldReader::new(bits))
746    }
747}
748impl core::ops::Deref for DRXL_R {
749    type Target = crate::FieldReader<bool, bool>;
750    #[inline(always)]
751    fn deref(&self) -> &Self::Target {
752        &self.0
753    }
754}
755#[doc = "Field `DRXL` writer - Message stored to Dedicated Receive Buffer Interrupt Line"]
756pub struct DRXL_W<'a> {
757    w: &'a mut W,
758}
759impl<'a> DRXL_W<'a> {
760    #[doc = r"Sets the field bit"]
761    #[inline(always)]
762    pub fn set_bit(self) -> &'a mut W {
763        self.bit(true)
764    }
765    #[doc = r"Clears the field bit"]
766    #[inline(always)]
767    pub fn clear_bit(self) -> &'a mut W {
768        self.bit(false)
769    }
770    #[doc = r"Writes raw bits to the field"]
771    #[inline(always)]
772    pub fn bit(self, value: bool) -> &'a mut W {
773        self.w.bits = (self.w.bits & !(0x01 << 19)) | ((value as u32 & 0x01) << 19);
774        self.w
775    }
776}
777#[doc = "Field `ELOL` reader - Error Logging Overflow Interrupt Line"]
778pub struct ELOL_R(crate::FieldReader<bool, bool>);
779impl ELOL_R {
780    #[inline(always)]
781    pub(crate) fn new(bits: bool) -> Self {
782        ELOL_R(crate::FieldReader::new(bits))
783    }
784}
785impl core::ops::Deref for ELOL_R {
786    type Target = crate::FieldReader<bool, bool>;
787    #[inline(always)]
788    fn deref(&self) -> &Self::Target {
789        &self.0
790    }
791}
792#[doc = "Field `ELOL` writer - Error Logging Overflow Interrupt Line"]
793pub struct ELOL_W<'a> {
794    w: &'a mut W,
795}
796impl<'a> ELOL_W<'a> {
797    #[doc = r"Sets the field bit"]
798    #[inline(always)]
799    pub fn set_bit(self) -> &'a mut W {
800        self.bit(true)
801    }
802    #[doc = r"Clears the field bit"]
803    #[inline(always)]
804    pub fn clear_bit(self) -> &'a mut W {
805        self.bit(false)
806    }
807    #[doc = r"Writes raw bits to the field"]
808    #[inline(always)]
809    pub fn bit(self, value: bool) -> &'a mut W {
810        self.w.bits = (self.w.bits & !(0x01 << 22)) | ((value as u32 & 0x01) << 22);
811        self.w
812    }
813}
814#[doc = "Field `EPL` reader - Error Passive Interrupt Line"]
815pub struct EPL_R(crate::FieldReader<bool, bool>);
816impl EPL_R {
817    #[inline(always)]
818    pub(crate) fn new(bits: bool) -> Self {
819        EPL_R(crate::FieldReader::new(bits))
820    }
821}
822impl core::ops::Deref for EPL_R {
823    type Target = crate::FieldReader<bool, bool>;
824    #[inline(always)]
825    fn deref(&self) -> &Self::Target {
826        &self.0
827    }
828}
829#[doc = "Field `EPL` writer - Error Passive Interrupt Line"]
830pub struct EPL_W<'a> {
831    w: &'a mut W,
832}
833impl<'a> EPL_W<'a> {
834    #[doc = r"Sets the field bit"]
835    #[inline(always)]
836    pub fn set_bit(self) -> &'a mut W {
837        self.bit(true)
838    }
839    #[doc = r"Clears the field bit"]
840    #[inline(always)]
841    pub fn clear_bit(self) -> &'a mut W {
842        self.bit(false)
843    }
844    #[doc = r"Writes raw bits to the field"]
845    #[inline(always)]
846    pub fn bit(self, value: bool) -> &'a mut W {
847        self.w.bits = (self.w.bits & !(0x01 << 23)) | ((value as u32 & 0x01) << 23);
848        self.w
849    }
850}
851#[doc = "Field `EWL` reader - Warning Status Interrupt Line"]
852pub struct EWL_R(crate::FieldReader<bool, bool>);
853impl EWL_R {
854    #[inline(always)]
855    pub(crate) fn new(bits: bool) -> Self {
856        EWL_R(crate::FieldReader::new(bits))
857    }
858}
859impl core::ops::Deref for EWL_R {
860    type Target = crate::FieldReader<bool, bool>;
861    #[inline(always)]
862    fn deref(&self) -> &Self::Target {
863        &self.0
864    }
865}
866#[doc = "Field `EWL` writer - Warning Status Interrupt Line"]
867pub struct EWL_W<'a> {
868    w: &'a mut W,
869}
870impl<'a> EWL_W<'a> {
871    #[doc = r"Sets the field bit"]
872    #[inline(always)]
873    pub fn set_bit(self) -> &'a mut W {
874        self.bit(true)
875    }
876    #[doc = r"Clears the field bit"]
877    #[inline(always)]
878    pub fn clear_bit(self) -> &'a mut W {
879        self.bit(false)
880    }
881    #[doc = r"Writes raw bits to the field"]
882    #[inline(always)]
883    pub fn bit(self, value: bool) -> &'a mut W {
884        self.w.bits = (self.w.bits & !(0x01 << 24)) | ((value as u32 & 0x01) << 24);
885        self.w
886    }
887}
888#[doc = "Field `BOL` reader - Bus_Off Status Interrupt Line"]
889pub struct BOL_R(crate::FieldReader<bool, bool>);
890impl BOL_R {
891    #[inline(always)]
892    pub(crate) fn new(bits: bool) -> Self {
893        BOL_R(crate::FieldReader::new(bits))
894    }
895}
896impl core::ops::Deref for BOL_R {
897    type Target = crate::FieldReader<bool, bool>;
898    #[inline(always)]
899    fn deref(&self) -> &Self::Target {
900        &self.0
901    }
902}
903#[doc = "Field `BOL` writer - Bus_Off Status Interrupt Line"]
904pub struct BOL_W<'a> {
905    w: &'a mut W,
906}
907impl<'a> BOL_W<'a> {
908    #[doc = r"Sets the field bit"]
909    #[inline(always)]
910    pub fn set_bit(self) -> &'a mut W {
911        self.bit(true)
912    }
913    #[doc = r"Clears the field bit"]
914    #[inline(always)]
915    pub fn clear_bit(self) -> &'a mut W {
916        self.bit(false)
917    }
918    #[doc = r"Writes raw bits to the field"]
919    #[inline(always)]
920    pub fn bit(self, value: bool) -> &'a mut W {
921        self.w.bits = (self.w.bits & !(0x01 << 25)) | ((value as u32 & 0x01) << 25);
922        self.w
923    }
924}
925#[doc = "Field `WDIL` reader - Watchdog Interrupt Line"]
926pub struct WDIL_R(crate::FieldReader<bool, bool>);
927impl WDIL_R {
928    #[inline(always)]
929    pub(crate) fn new(bits: bool) -> Self {
930        WDIL_R(crate::FieldReader::new(bits))
931    }
932}
933impl core::ops::Deref for WDIL_R {
934    type Target = crate::FieldReader<bool, bool>;
935    #[inline(always)]
936    fn deref(&self) -> &Self::Target {
937        &self.0
938    }
939}
940#[doc = "Field `WDIL` writer - Watchdog Interrupt Line"]
941pub struct WDIL_W<'a> {
942    w: &'a mut W,
943}
944impl<'a> WDIL_W<'a> {
945    #[doc = r"Sets the field bit"]
946    #[inline(always)]
947    pub fn set_bit(self) -> &'a mut W {
948        self.bit(true)
949    }
950    #[doc = r"Clears the field bit"]
951    #[inline(always)]
952    pub fn clear_bit(self) -> &'a mut W {
953        self.bit(false)
954    }
955    #[doc = r"Writes raw bits to the field"]
956    #[inline(always)]
957    pub fn bit(self, value: bool) -> &'a mut W {
958        self.w.bits = (self.w.bits & !(0x01 << 26)) | ((value as u32 & 0x01) << 26);
959        self.w
960    }
961}
962#[doc = "Field `CRCEL` reader - CRC Error Interrupt Line"]
963pub struct CRCEL_R(crate::FieldReader<bool, bool>);
964impl CRCEL_R {
965    #[inline(always)]
966    pub(crate) fn new(bits: bool) -> Self {
967        CRCEL_R(crate::FieldReader::new(bits))
968    }
969}
970impl core::ops::Deref for CRCEL_R {
971    type Target = crate::FieldReader<bool, bool>;
972    #[inline(always)]
973    fn deref(&self) -> &Self::Target {
974        &self.0
975    }
976}
977#[doc = "Field `CRCEL` writer - CRC Error Interrupt Line"]
978pub struct CRCEL_W<'a> {
979    w: &'a mut W,
980}
981impl<'a> CRCEL_W<'a> {
982    #[doc = r"Sets the field bit"]
983    #[inline(always)]
984    pub fn set_bit(self) -> &'a mut W {
985        self.bit(true)
986    }
987    #[doc = r"Clears the field bit"]
988    #[inline(always)]
989    pub fn clear_bit(self) -> &'a mut W {
990        self.bit(false)
991    }
992    #[doc = r"Writes raw bits to the field"]
993    #[inline(always)]
994    pub fn bit(self, value: bool) -> &'a mut W {
995        self.w.bits = (self.w.bits & !(0x01 << 27)) | ((value as u32 & 0x01) << 27);
996        self.w
997    }
998}
999#[doc = "Field `BEL` reader - Bit Error Interrupt Line"]
1000pub struct BEL_R(crate::FieldReader<bool, bool>);
1001impl BEL_R {
1002    #[inline(always)]
1003    pub(crate) fn new(bits: bool) -> Self {
1004        BEL_R(crate::FieldReader::new(bits))
1005    }
1006}
1007impl core::ops::Deref for BEL_R {
1008    type Target = crate::FieldReader<bool, bool>;
1009    #[inline(always)]
1010    fn deref(&self) -> &Self::Target {
1011        &self.0
1012    }
1013}
1014#[doc = "Field `BEL` writer - Bit Error Interrupt Line"]
1015pub struct BEL_W<'a> {
1016    w: &'a mut W,
1017}
1018impl<'a> BEL_W<'a> {
1019    #[doc = r"Sets the field bit"]
1020    #[inline(always)]
1021    pub fn set_bit(self) -> &'a mut W {
1022        self.bit(true)
1023    }
1024    #[doc = r"Clears the field bit"]
1025    #[inline(always)]
1026    pub fn clear_bit(self) -> &'a mut W {
1027        self.bit(false)
1028    }
1029    #[doc = r"Writes raw bits to the field"]
1030    #[inline(always)]
1031    pub fn bit(self, value: bool) -> &'a mut W {
1032        self.w.bits = (self.w.bits & !(0x01 << 28)) | ((value as u32 & 0x01) << 28);
1033        self.w
1034    }
1035}
1036#[doc = "Field `ACKEL` reader - Acknowledge Error Interrupt Line"]
1037pub struct ACKEL_R(crate::FieldReader<bool, bool>);
1038impl ACKEL_R {
1039    #[inline(always)]
1040    pub(crate) fn new(bits: bool) -> Self {
1041        ACKEL_R(crate::FieldReader::new(bits))
1042    }
1043}
1044impl core::ops::Deref for ACKEL_R {
1045    type Target = crate::FieldReader<bool, bool>;
1046    #[inline(always)]
1047    fn deref(&self) -> &Self::Target {
1048        &self.0
1049    }
1050}
1051#[doc = "Field `ACKEL` writer - Acknowledge Error Interrupt Line"]
1052pub struct ACKEL_W<'a> {
1053    w: &'a mut W,
1054}
1055impl<'a> ACKEL_W<'a> {
1056    #[doc = r"Sets the field bit"]
1057    #[inline(always)]
1058    pub fn set_bit(self) -> &'a mut W {
1059        self.bit(true)
1060    }
1061    #[doc = r"Clears the field bit"]
1062    #[inline(always)]
1063    pub fn clear_bit(self) -> &'a mut W {
1064        self.bit(false)
1065    }
1066    #[doc = r"Writes raw bits to the field"]
1067    #[inline(always)]
1068    pub fn bit(self, value: bool) -> &'a mut W {
1069        self.w.bits = (self.w.bits & !(0x01 << 29)) | ((value as u32 & 0x01) << 29);
1070        self.w
1071    }
1072}
1073#[doc = "Field `FOEL` reader - Format Error Interrupt Line"]
1074pub struct FOEL_R(crate::FieldReader<bool, bool>);
1075impl FOEL_R {
1076    #[inline(always)]
1077    pub(crate) fn new(bits: bool) -> Self {
1078        FOEL_R(crate::FieldReader::new(bits))
1079    }
1080}
1081impl core::ops::Deref for FOEL_R {
1082    type Target = crate::FieldReader<bool, bool>;
1083    #[inline(always)]
1084    fn deref(&self) -> &Self::Target {
1085        &self.0
1086    }
1087}
1088#[doc = "Field `FOEL` writer - Format Error Interrupt Line"]
1089pub struct FOEL_W<'a> {
1090    w: &'a mut W,
1091}
1092impl<'a> FOEL_W<'a> {
1093    #[doc = r"Sets the field bit"]
1094    #[inline(always)]
1095    pub fn set_bit(self) -> &'a mut W {
1096        self.bit(true)
1097    }
1098    #[doc = r"Clears the field bit"]
1099    #[inline(always)]
1100    pub fn clear_bit(self) -> &'a mut W {
1101        self.bit(false)
1102    }
1103    #[doc = r"Writes raw bits to the field"]
1104    #[inline(always)]
1105    pub fn bit(self, value: bool) -> &'a mut W {
1106        self.w.bits = (self.w.bits & !(0x01 << 30)) | ((value as u32 & 0x01) << 30);
1107        self.w
1108    }
1109}
1110#[doc = "Field `STEL` reader - Stuff Error Interrupt Line"]
1111pub struct STEL_R(crate::FieldReader<bool, bool>);
1112impl STEL_R {
1113    #[inline(always)]
1114    pub(crate) fn new(bits: bool) -> Self {
1115        STEL_R(crate::FieldReader::new(bits))
1116    }
1117}
1118impl core::ops::Deref for STEL_R {
1119    type Target = crate::FieldReader<bool, bool>;
1120    #[inline(always)]
1121    fn deref(&self) -> &Self::Target {
1122        &self.0
1123    }
1124}
1125#[doc = "Field `STEL` writer - Stuff Error Interrupt Line"]
1126pub struct STEL_W<'a> {
1127    w: &'a mut W,
1128}
1129impl<'a> STEL_W<'a> {
1130    #[doc = r"Sets the field bit"]
1131    #[inline(always)]
1132    pub fn set_bit(self) -> &'a mut W {
1133        self.bit(true)
1134    }
1135    #[doc = r"Clears the field bit"]
1136    #[inline(always)]
1137    pub fn clear_bit(self) -> &'a mut W {
1138        self.bit(false)
1139    }
1140    #[doc = r"Writes raw bits to the field"]
1141    #[inline(always)]
1142    pub fn bit(self, value: bool) -> &'a mut W {
1143        self.w.bits = (self.w.bits & !(0x01 << 31)) | ((value as u32 & 0x01) << 31);
1144        self.w
1145    }
1146}
1147impl R {
1148    #[doc = "Bit 0 - Receive FIFO 0 New Message Interrupt Line"]
1149    #[inline(always)]
1150    pub fn rf0nl(&self) -> RF0NL_R {
1151        RF0NL_R::new((self.bits & 0x01) != 0)
1152    }
1153    #[doc = "Bit 1 - Receive FIFO 0 Watermark Reached Interrupt Line"]
1154    #[inline(always)]
1155    pub fn rf0wl(&self) -> RF0WL_R {
1156        RF0WL_R::new(((self.bits >> 1) & 0x01) != 0)
1157    }
1158    #[doc = "Bit 2 - Receive FIFO 0 Full Interrupt Line"]
1159    #[inline(always)]
1160    pub fn rf0fl(&self) -> RF0FL_R {
1161        RF0FL_R::new(((self.bits >> 2) & 0x01) != 0)
1162    }
1163    #[doc = "Bit 3 - Receive FIFO 0 Message Lost Interrupt Line"]
1164    #[inline(always)]
1165    pub fn rf0ll(&self) -> RF0LL_R {
1166        RF0LL_R::new(((self.bits >> 3) & 0x01) != 0)
1167    }
1168    #[doc = "Bit 4 - Receive FIFO 1 New Message Interrupt Line"]
1169    #[inline(always)]
1170    pub fn rf1nl(&self) -> RF1NL_R {
1171        RF1NL_R::new(((self.bits >> 4) & 0x01) != 0)
1172    }
1173    #[doc = "Bit 5 - Receive FIFO 1 Watermark Reached Interrupt Line"]
1174    #[inline(always)]
1175    pub fn rf1wl(&self) -> RF1WL_R {
1176        RF1WL_R::new(((self.bits >> 5) & 0x01) != 0)
1177    }
1178    #[doc = "Bit 6 - Receive FIFO 1 Full Interrupt Line"]
1179    #[inline(always)]
1180    pub fn rf1fl(&self) -> RF1FL_R {
1181        RF1FL_R::new(((self.bits >> 6) & 0x01) != 0)
1182    }
1183    #[doc = "Bit 7 - Receive FIFO 1 Message Lost Interrupt Line"]
1184    #[inline(always)]
1185    pub fn rf1ll(&self) -> RF1LL_R {
1186        RF1LL_R::new(((self.bits >> 7) & 0x01) != 0)
1187    }
1188    #[doc = "Bit 8 - High Priority Message Interrupt Line"]
1189    #[inline(always)]
1190    pub fn hpml(&self) -> HPML_R {
1191        HPML_R::new(((self.bits >> 8) & 0x01) != 0)
1192    }
1193    #[doc = "Bit 9 - Transmission Completed Interrupt Line"]
1194    #[inline(always)]
1195    pub fn tcl(&self) -> TCL_R {
1196        TCL_R::new(((self.bits >> 9) & 0x01) != 0)
1197    }
1198    #[doc = "Bit 10 - Transmission Cancellation Finished Interrupt Line"]
1199    #[inline(always)]
1200    pub fn tcfl(&self) -> TCFL_R {
1201        TCFL_R::new(((self.bits >> 10) & 0x01) != 0)
1202    }
1203    #[doc = "Bit 11 - Tx FIFO Empty Interrupt Line"]
1204    #[inline(always)]
1205    pub fn tfel(&self) -> TFEL_R {
1206        TFEL_R::new(((self.bits >> 11) & 0x01) != 0)
1207    }
1208    #[doc = "Bit 12 - Tx Event FIFO New Entry Interrupt Line"]
1209    #[inline(always)]
1210    pub fn tefnl(&self) -> TEFNL_R {
1211        TEFNL_R::new(((self.bits >> 12) & 0x01) != 0)
1212    }
1213    #[doc = "Bit 13 - Tx Event FIFO Watermark Reached Interrupt Line"]
1214    #[inline(always)]
1215    pub fn tefwl(&self) -> TEFWL_R {
1216        TEFWL_R::new(((self.bits >> 13) & 0x01) != 0)
1217    }
1218    #[doc = "Bit 14 - Tx Event FIFO Full Interrupt Line"]
1219    #[inline(always)]
1220    pub fn teffl(&self) -> TEFFL_R {
1221        TEFFL_R::new(((self.bits >> 14) & 0x01) != 0)
1222    }
1223    #[doc = "Bit 15 - Tx Event FIFO Event Lost Interrupt Line"]
1224    #[inline(always)]
1225    pub fn tefll(&self) -> TEFLL_R {
1226        TEFLL_R::new(((self.bits >> 15) & 0x01) != 0)
1227    }
1228    #[doc = "Bit 16 - Timestamp Wraparound Interrupt Line"]
1229    #[inline(always)]
1230    pub fn tswl(&self) -> TSWL_R {
1231        TSWL_R::new(((self.bits >> 16) & 0x01) != 0)
1232    }
1233    #[doc = "Bit 17 - Message RAM Access Failure Interrupt Line"]
1234    #[inline(always)]
1235    pub fn mrafl(&self) -> MRAFL_R {
1236        MRAFL_R::new(((self.bits >> 17) & 0x01) != 0)
1237    }
1238    #[doc = "Bit 18 - Timeout Occurred Interrupt Line"]
1239    #[inline(always)]
1240    pub fn tool(&self) -> TOOL_R {
1241        TOOL_R::new(((self.bits >> 18) & 0x01) != 0)
1242    }
1243    #[doc = "Bit 19 - Message stored to Dedicated Receive Buffer Interrupt Line"]
1244    #[inline(always)]
1245    pub fn drxl(&self) -> DRXL_R {
1246        DRXL_R::new(((self.bits >> 19) & 0x01) != 0)
1247    }
1248    #[doc = "Bit 22 - Error Logging Overflow Interrupt Line"]
1249    #[inline(always)]
1250    pub fn elol(&self) -> ELOL_R {
1251        ELOL_R::new(((self.bits >> 22) & 0x01) != 0)
1252    }
1253    #[doc = "Bit 23 - Error Passive Interrupt Line"]
1254    #[inline(always)]
1255    pub fn epl(&self) -> EPL_R {
1256        EPL_R::new(((self.bits >> 23) & 0x01) != 0)
1257    }
1258    #[doc = "Bit 24 - Warning Status Interrupt Line"]
1259    #[inline(always)]
1260    pub fn ewl(&self) -> EWL_R {
1261        EWL_R::new(((self.bits >> 24) & 0x01) != 0)
1262    }
1263    #[doc = "Bit 25 - Bus_Off Status Interrupt Line"]
1264    #[inline(always)]
1265    pub fn bol(&self) -> BOL_R {
1266        BOL_R::new(((self.bits >> 25) & 0x01) != 0)
1267    }
1268    #[doc = "Bit 26 - Watchdog Interrupt Line"]
1269    #[inline(always)]
1270    pub fn wdil(&self) -> WDIL_R {
1271        WDIL_R::new(((self.bits >> 26) & 0x01) != 0)
1272    }
1273    #[doc = "Bit 27 - CRC Error Interrupt Line"]
1274    #[inline(always)]
1275    pub fn crcel(&self) -> CRCEL_R {
1276        CRCEL_R::new(((self.bits >> 27) & 0x01) != 0)
1277    }
1278    #[doc = "Bit 28 - Bit Error Interrupt Line"]
1279    #[inline(always)]
1280    pub fn bel(&self) -> BEL_R {
1281        BEL_R::new(((self.bits >> 28) & 0x01) != 0)
1282    }
1283    #[doc = "Bit 29 - Acknowledge Error Interrupt Line"]
1284    #[inline(always)]
1285    pub fn ackel(&self) -> ACKEL_R {
1286        ACKEL_R::new(((self.bits >> 29) & 0x01) != 0)
1287    }
1288    #[doc = "Bit 30 - Format Error Interrupt Line"]
1289    #[inline(always)]
1290    pub fn foel(&self) -> FOEL_R {
1291        FOEL_R::new(((self.bits >> 30) & 0x01) != 0)
1292    }
1293    #[doc = "Bit 31 - Stuff Error Interrupt Line"]
1294    #[inline(always)]
1295    pub fn stel(&self) -> STEL_R {
1296        STEL_R::new(((self.bits >> 31) & 0x01) != 0)
1297    }
1298}
1299impl W {
1300    #[doc = "Bit 0 - Receive FIFO 0 New Message Interrupt Line"]
1301    #[inline(always)]
1302    pub fn rf0nl(&mut self) -> RF0NL_W {
1303        RF0NL_W { w: self }
1304    }
1305    #[doc = "Bit 1 - Receive FIFO 0 Watermark Reached Interrupt Line"]
1306    #[inline(always)]
1307    pub fn rf0wl(&mut self) -> RF0WL_W {
1308        RF0WL_W { w: self }
1309    }
1310    #[doc = "Bit 2 - Receive FIFO 0 Full Interrupt Line"]
1311    #[inline(always)]
1312    pub fn rf0fl(&mut self) -> RF0FL_W {
1313        RF0FL_W { w: self }
1314    }
1315    #[doc = "Bit 3 - Receive FIFO 0 Message Lost Interrupt Line"]
1316    #[inline(always)]
1317    pub fn rf0ll(&mut self) -> RF0LL_W {
1318        RF0LL_W { w: self }
1319    }
1320    #[doc = "Bit 4 - Receive FIFO 1 New Message Interrupt Line"]
1321    #[inline(always)]
1322    pub fn rf1nl(&mut self) -> RF1NL_W {
1323        RF1NL_W { w: self }
1324    }
1325    #[doc = "Bit 5 - Receive FIFO 1 Watermark Reached Interrupt Line"]
1326    #[inline(always)]
1327    pub fn rf1wl(&mut self) -> RF1WL_W {
1328        RF1WL_W { w: self }
1329    }
1330    #[doc = "Bit 6 - Receive FIFO 1 Full Interrupt Line"]
1331    #[inline(always)]
1332    pub fn rf1fl(&mut self) -> RF1FL_W {
1333        RF1FL_W { w: self }
1334    }
1335    #[doc = "Bit 7 - Receive FIFO 1 Message Lost Interrupt Line"]
1336    #[inline(always)]
1337    pub fn rf1ll(&mut self) -> RF1LL_W {
1338        RF1LL_W { w: self }
1339    }
1340    #[doc = "Bit 8 - High Priority Message Interrupt Line"]
1341    #[inline(always)]
1342    pub fn hpml(&mut self) -> HPML_W {
1343        HPML_W { w: self }
1344    }
1345    #[doc = "Bit 9 - Transmission Completed Interrupt Line"]
1346    #[inline(always)]
1347    pub fn tcl(&mut self) -> TCL_W {
1348        TCL_W { w: self }
1349    }
1350    #[doc = "Bit 10 - Transmission Cancellation Finished Interrupt Line"]
1351    #[inline(always)]
1352    pub fn tcfl(&mut self) -> TCFL_W {
1353        TCFL_W { w: self }
1354    }
1355    #[doc = "Bit 11 - Tx FIFO Empty Interrupt Line"]
1356    #[inline(always)]
1357    pub fn tfel(&mut self) -> TFEL_W {
1358        TFEL_W { w: self }
1359    }
1360    #[doc = "Bit 12 - Tx Event FIFO New Entry Interrupt Line"]
1361    #[inline(always)]
1362    pub fn tefnl(&mut self) -> TEFNL_W {
1363        TEFNL_W { w: self }
1364    }
1365    #[doc = "Bit 13 - Tx Event FIFO Watermark Reached Interrupt Line"]
1366    #[inline(always)]
1367    pub fn tefwl(&mut self) -> TEFWL_W {
1368        TEFWL_W { w: self }
1369    }
1370    #[doc = "Bit 14 - Tx Event FIFO Full Interrupt Line"]
1371    #[inline(always)]
1372    pub fn teffl(&mut self) -> TEFFL_W {
1373        TEFFL_W { w: self }
1374    }
1375    #[doc = "Bit 15 - Tx Event FIFO Event Lost Interrupt Line"]
1376    #[inline(always)]
1377    pub fn tefll(&mut self) -> TEFLL_W {
1378        TEFLL_W { w: self }
1379    }
1380    #[doc = "Bit 16 - Timestamp Wraparound Interrupt Line"]
1381    #[inline(always)]
1382    pub fn tswl(&mut self) -> TSWL_W {
1383        TSWL_W { w: self }
1384    }
1385    #[doc = "Bit 17 - Message RAM Access Failure Interrupt Line"]
1386    #[inline(always)]
1387    pub fn mrafl(&mut self) -> MRAFL_W {
1388        MRAFL_W { w: self }
1389    }
1390    #[doc = "Bit 18 - Timeout Occurred Interrupt Line"]
1391    #[inline(always)]
1392    pub fn tool(&mut self) -> TOOL_W {
1393        TOOL_W { w: self }
1394    }
1395    #[doc = "Bit 19 - Message stored to Dedicated Receive Buffer Interrupt Line"]
1396    #[inline(always)]
1397    pub fn drxl(&mut self) -> DRXL_W {
1398        DRXL_W { w: self }
1399    }
1400    #[doc = "Bit 22 - Error Logging Overflow Interrupt Line"]
1401    #[inline(always)]
1402    pub fn elol(&mut self) -> ELOL_W {
1403        ELOL_W { w: self }
1404    }
1405    #[doc = "Bit 23 - Error Passive Interrupt Line"]
1406    #[inline(always)]
1407    pub fn epl(&mut self) -> EPL_W {
1408        EPL_W { w: self }
1409    }
1410    #[doc = "Bit 24 - Warning Status Interrupt Line"]
1411    #[inline(always)]
1412    pub fn ewl(&mut self) -> EWL_W {
1413        EWL_W { w: self }
1414    }
1415    #[doc = "Bit 25 - Bus_Off Status Interrupt Line"]
1416    #[inline(always)]
1417    pub fn bol(&mut self) -> BOL_W {
1418        BOL_W { w: self }
1419    }
1420    #[doc = "Bit 26 - Watchdog Interrupt Line"]
1421    #[inline(always)]
1422    pub fn wdil(&mut self) -> WDIL_W {
1423        WDIL_W { w: self }
1424    }
1425    #[doc = "Bit 27 - CRC Error Interrupt Line"]
1426    #[inline(always)]
1427    pub fn crcel(&mut self) -> CRCEL_W {
1428        CRCEL_W { w: self }
1429    }
1430    #[doc = "Bit 28 - Bit Error Interrupt Line"]
1431    #[inline(always)]
1432    pub fn bel(&mut self) -> BEL_W {
1433        BEL_W { w: self }
1434    }
1435    #[doc = "Bit 29 - Acknowledge Error Interrupt Line"]
1436    #[inline(always)]
1437    pub fn ackel(&mut self) -> ACKEL_W {
1438        ACKEL_W { w: self }
1439    }
1440    #[doc = "Bit 30 - Format Error Interrupt Line"]
1441    #[inline(always)]
1442    pub fn foel(&mut self) -> FOEL_W {
1443        FOEL_W { w: self }
1444    }
1445    #[doc = "Bit 31 - Stuff Error Interrupt Line"]
1446    #[inline(always)]
1447    pub fn stel(&mut self) -> STEL_W {
1448        STEL_W { w: self }
1449    }
1450    #[doc = "Writes raw bits to the register."]
1451    #[inline(always)]
1452    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
1453        self.0.bits(bits);
1454        self
1455    }
1456}
1457#[doc = "Interrupt Line Select Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [mcan_ils](index.html) module"]
1458pub struct MCAN_ILS_SPEC;
1459impl crate::RegisterSpec for MCAN_ILS_SPEC {
1460    type Ux = u32;
1461}
1462#[doc = "`read()` method returns [mcan_ils::R](R) reader structure"]
1463impl crate::Readable for MCAN_ILS_SPEC {
1464    type Reader = R;
1465}
1466#[doc = "`write(|w| ..)` method takes [mcan_ils::W](W) writer structure"]
1467impl crate::Writable for MCAN_ILS_SPEC {
1468    type Writer = W;
1469}
1470#[doc = "`reset()` method sets MCAN_ILS to value 0"]
1471impl crate::Resettable for MCAN_ILS_SPEC {
1472    #[inline(always)]
1473    fn reset_value() -> Self::Ux {
1474        0
1475    }
1476}
atsame70q21/mcan0/mcan_ils.rs

atsame70q21/mcan0/
mcan_ils.rs
