atsame70q21/afec0/
afec_acr.rs1#[doc = "Register `AFEC_ACR` reader"]
2pub struct R(crate::R<AFEC_ACR_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<AFEC_ACR_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<AFEC_ACR_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<AFEC_ACR_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `AFEC_ACR` writer"]
17pub struct W(crate::W<AFEC_ACR_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<AFEC_ACR_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<AFEC_ACR_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<AFEC_ACR_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `PGA0EN` reader - PGA0 Enable"]
38pub struct PGA0EN_R(crate::FieldReader<bool, bool>);
39impl PGA0EN_R {
40 #[inline(always)]
41 pub(crate) fn new(bits: bool) -> Self {
42 PGA0EN_R(crate::FieldReader::new(bits))
43 }
44}
45impl core::ops::Deref for PGA0EN_R {
46 type Target = crate::FieldReader<bool, bool>;
47 #[inline(always)]
48 fn deref(&self) -> &Self::Target {
49 &self.0
50 }
51}
52#[doc = "Field `PGA0EN` writer - PGA0 Enable"]
53pub struct PGA0EN_W<'a> {
54 w: &'a mut W,
55}
56impl<'a> PGA0EN_W<'a> {
57 #[doc = r"Sets the field bit"]
58 #[inline(always)]
59 pub fn set_bit(self) -> &'a mut W {
60 self.bit(true)
61 }
62 #[doc = r"Clears the field bit"]
63 #[inline(always)]
64 pub fn clear_bit(self) -> &'a mut W {
65 self.bit(false)
66 }
67 #[doc = r"Writes raw bits to the field"]
68 #[inline(always)]
69 pub fn bit(self, value: bool) -> &'a mut W {
70 self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2);
71 self.w
72 }
73}
74#[doc = "Field `PGA1EN` reader - PGA1 Enable"]
75pub struct PGA1EN_R(crate::FieldReader<bool, bool>);
76impl PGA1EN_R {
77 #[inline(always)]
78 pub(crate) fn new(bits: bool) -> Self {
79 PGA1EN_R(crate::FieldReader::new(bits))
80 }
81}
82impl core::ops::Deref for PGA1EN_R {
83 type Target = crate::FieldReader<bool, bool>;
84 #[inline(always)]
85 fn deref(&self) -> &Self::Target {
86 &self.0
87 }
88}
89#[doc = "Field `PGA1EN` writer - PGA1 Enable"]
90pub struct PGA1EN_W<'a> {
91 w: &'a mut W,
92}
93impl<'a> PGA1EN_W<'a> {
94 #[doc = r"Sets the field bit"]
95 #[inline(always)]
96 pub fn set_bit(self) -> &'a mut W {
97 self.bit(true)
98 }
99 #[doc = r"Clears the field bit"]
100 #[inline(always)]
101 pub fn clear_bit(self) -> &'a mut W {
102 self.bit(false)
103 }
104 #[doc = r"Writes raw bits to the field"]
105 #[inline(always)]
106 pub fn bit(self, value: bool) -> &'a mut W {
107 self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3);
108 self.w
109 }
110}
111#[doc = "Field `IBCTL` reader - AFE Bias Current Control"]
112pub struct IBCTL_R(crate::FieldReader<u8, u8>);
113impl IBCTL_R {
114 #[inline(always)]
115 pub(crate) fn new(bits: u8) -> Self {
116 IBCTL_R(crate::FieldReader::new(bits))
117 }
118}
119impl core::ops::Deref for IBCTL_R {
120 type Target = crate::FieldReader<u8, u8>;
121 #[inline(always)]
122 fn deref(&self) -> &Self::Target {
123 &self.0
124 }
125}
126#[doc = "Field `IBCTL` writer - AFE Bias Current Control"]
127pub struct IBCTL_W<'a> {
128 w: &'a mut W,
129}
130impl<'a> IBCTL_W<'a> {
131 #[doc = r"Writes raw bits to the field"]
132 #[inline(always)]
133 pub unsafe fn bits(self, value: u8) -> &'a mut W {
134 self.w.bits = (self.w.bits & !(0x03 << 8)) | ((value as u32 & 0x03) << 8);
135 self.w
136 }
137}
138impl R {
139 #[doc = "Bit 2 - PGA0 Enable"]
140 #[inline(always)]
141 pub fn pga0en(&self) -> PGA0EN_R {
142 PGA0EN_R::new(((self.bits >> 2) & 0x01) != 0)
143 }
144 #[doc = "Bit 3 - PGA1 Enable"]
145 #[inline(always)]
146 pub fn pga1en(&self) -> PGA1EN_R {
147 PGA1EN_R::new(((self.bits >> 3) & 0x01) != 0)
148 }
149 #[doc = "Bits 8:9 - AFE Bias Current Control"]
150 #[inline(always)]
151 pub fn ibctl(&self) -> IBCTL_R {
152 IBCTL_R::new(((self.bits >> 8) & 0x03) as u8)
153 }
154}
155impl W {
156 #[doc = "Bit 2 - PGA0 Enable"]
157 #[inline(always)]
158 pub fn pga0en(&mut self) -> PGA0EN_W {
159 PGA0EN_W { w: self }
160 }
161 #[doc = "Bit 3 - PGA1 Enable"]
162 #[inline(always)]
163 pub fn pga1en(&mut self) -> PGA1EN_W {
164 PGA1EN_W { w: self }
165 }
166 #[doc = "Bits 8:9 - AFE Bias Current Control"]
167 #[inline(always)]
168 pub fn ibctl(&mut self) -> IBCTL_W {
169 IBCTL_W { w: self }
170 }
171 #[doc = "Writes raw bits to the register."]
172 #[inline(always)]
173 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
174 self.0.bits(bits);
175 self
176 }
177}
178#[doc = "AFEC Analog Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [afec_acr](index.html) module"]
179pub struct AFEC_ACR_SPEC;
180impl crate::RegisterSpec for AFEC_ACR_SPEC {
181 type Ux = u32;
182}
183#[doc = "`read()` method returns [afec_acr::R](R) reader structure"]
184impl crate::Readable for AFEC_ACR_SPEC {
185 type Reader = R;
186}
187#[doc = "`write(|w| ..)` method takes [afec_acr::W](W) writer structure"]
188impl crate::Writable for AFEC_ACR_SPEC {
189 type Writer = W;
190}
191#[doc = "`reset()` method sets AFEC_ACR to value 0"]
192impl crate::Resettable for AFEC_ACR_SPEC {
193 #[inline(always)]
194 fn reset_value() -> Self::Ux {
195 0
196 }
197}