atsame70q21/ssc/
ssc_rfmr.rs1#[doc = "Register `SSC_RFMR` reader"]
2pub struct R(crate::R<SSC_RFMR_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<SSC_RFMR_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<SSC_RFMR_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<SSC_RFMR_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `SSC_RFMR` writer"]
17pub struct W(crate::W<SSC_RFMR_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<SSC_RFMR_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<SSC_RFMR_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<SSC_RFMR_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `DATLEN` reader - Data Length"]
38pub struct DATLEN_R(crate::FieldReader<u8, u8>);
39impl DATLEN_R {
40 #[inline(always)]
41 pub(crate) fn new(bits: u8) -> Self {
42 DATLEN_R(crate::FieldReader::new(bits))
43 }
44}
45impl core::ops::Deref for DATLEN_R {
46 type Target = crate::FieldReader<u8, u8>;
47 #[inline(always)]
48 fn deref(&self) -> &Self::Target {
49 &self.0
50 }
51}
52#[doc = "Field `DATLEN` writer - Data Length"]
53pub struct DATLEN_W<'a> {
54 w: &'a mut W,
55}
56impl<'a> DATLEN_W<'a> {
57 #[doc = r"Writes raw bits to the field"]
58 #[inline(always)]
59 pub unsafe fn bits(self, value: u8) -> &'a mut W {
60 self.w.bits = (self.w.bits & !0x1f) | (value as u32 & 0x1f);
61 self.w
62 }
63}
64#[doc = "Field `LOOP` reader - Loop Mode"]
65pub struct LOOP_R(crate::FieldReader<bool, bool>);
66impl LOOP_R {
67 #[inline(always)]
68 pub(crate) fn new(bits: bool) -> Self {
69 LOOP_R(crate::FieldReader::new(bits))
70 }
71}
72impl core::ops::Deref for LOOP_R {
73 type Target = crate::FieldReader<bool, bool>;
74 #[inline(always)]
75 fn deref(&self) -> &Self::Target {
76 &self.0
77 }
78}
79#[doc = "Field `LOOP` writer - Loop Mode"]
80pub struct LOOP_W<'a> {
81 w: &'a mut W,
82}
83impl<'a> LOOP_W<'a> {
84 #[doc = r"Sets the field bit"]
85 #[inline(always)]
86 pub fn set_bit(self) -> &'a mut W {
87 self.bit(true)
88 }
89 #[doc = r"Clears the field bit"]
90 #[inline(always)]
91 pub fn clear_bit(self) -> &'a mut W {
92 self.bit(false)
93 }
94 #[doc = r"Writes raw bits to the field"]
95 #[inline(always)]
96 pub fn bit(self, value: bool) -> &'a mut W {
97 self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5);
98 self.w
99 }
100}
101#[doc = "Field `MSBF` reader - Most Significant Bit First"]
102pub struct MSBF_R(crate::FieldReader<bool, bool>);
103impl MSBF_R {
104 #[inline(always)]
105 pub(crate) fn new(bits: bool) -> Self {
106 MSBF_R(crate::FieldReader::new(bits))
107 }
108}
109impl core::ops::Deref for MSBF_R {
110 type Target = crate::FieldReader<bool, bool>;
111 #[inline(always)]
112 fn deref(&self) -> &Self::Target {
113 &self.0
114 }
115}
116#[doc = "Field `MSBF` writer - Most Significant Bit First"]
117pub struct MSBF_W<'a> {
118 w: &'a mut W,
119}
120impl<'a> MSBF_W<'a> {
121 #[doc = r"Sets the field bit"]
122 #[inline(always)]
123 pub fn set_bit(self) -> &'a mut W {
124 self.bit(true)
125 }
126 #[doc = r"Clears the field bit"]
127 #[inline(always)]
128 pub fn clear_bit(self) -> &'a mut W {
129 self.bit(false)
130 }
131 #[doc = r"Writes raw bits to the field"]
132 #[inline(always)]
133 pub fn bit(self, value: bool) -> &'a mut W {
134 self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7);
135 self.w
136 }
137}
138#[doc = "Field `DATNB` reader - Data Number per Frame"]
139pub struct DATNB_R(crate::FieldReader<u8, u8>);
140impl DATNB_R {
141 #[inline(always)]
142 pub(crate) fn new(bits: u8) -> Self {
143 DATNB_R(crate::FieldReader::new(bits))
144 }
145}
146impl core::ops::Deref for DATNB_R {
147 type Target = crate::FieldReader<u8, u8>;
148 #[inline(always)]
149 fn deref(&self) -> &Self::Target {
150 &self.0
151 }
152}
153#[doc = "Field `DATNB` writer - Data Number per Frame"]
154pub struct DATNB_W<'a> {
155 w: &'a mut W,
156}
157impl<'a> DATNB_W<'a> {
158 #[doc = r"Writes raw bits to the field"]
159 #[inline(always)]
160 pub unsafe fn bits(self, value: u8) -> &'a mut W {
161 self.w.bits = (self.w.bits & !(0x0f << 8)) | ((value as u32 & 0x0f) << 8);
162 self.w
163 }
164}
165#[doc = "Field `FSLEN` reader - Receive Frame Sync Length"]
166pub struct FSLEN_R(crate::FieldReader<u8, u8>);
167impl FSLEN_R {
168 #[inline(always)]
169 pub(crate) fn new(bits: u8) -> Self {
170 FSLEN_R(crate::FieldReader::new(bits))
171 }
172}
173impl core::ops::Deref for FSLEN_R {
174 type Target = crate::FieldReader<u8, u8>;
175 #[inline(always)]
176 fn deref(&self) -> &Self::Target {
177 &self.0
178 }
179}
180#[doc = "Field `FSLEN` writer - Receive Frame Sync Length"]
181pub struct FSLEN_W<'a> {
182 w: &'a mut W,
183}
184impl<'a> FSLEN_W<'a> {
185 #[doc = r"Writes raw bits to the field"]
186 #[inline(always)]
187 pub unsafe fn bits(self, value: u8) -> &'a mut W {
188 self.w.bits = (self.w.bits & !(0x0f << 16)) | ((value as u32 & 0x0f) << 16);
189 self.w
190 }
191}
192#[doc = "Receive Frame Sync Output Selection\n\nValue on reset: 0"]
193#[derive(Clone, Copy, Debug, PartialEq)]
194#[repr(u8)]
195pub enum FSOS_A {
196 #[doc = "0: None, RF pin is an input"]
197 NONE = 0,
198 #[doc = "1: Negative Pulse, RF pin is an output"]
199 NEGATIVE = 1,
200 #[doc = "2: Positive Pulse, RF pin is an output"]
201 POSITIVE = 2,
202 #[doc = "3: Driven Low during data transfer, RF pin is an output"]
203 LOW = 3,
204 #[doc = "4: Driven High during data transfer, RF pin is an output"]
205 HIGH = 4,
206 #[doc = "5: Toggling at each start of data transfer, RF pin is an output"]
207 TOGGLING = 5,
208}
209impl From<FSOS_A> for u8 {
210 #[inline(always)]
211 fn from(variant: FSOS_A) -> Self {
212 variant as _
213 }
214}
215#[doc = "Field `FSOS` reader - Receive Frame Sync Output Selection"]
216pub struct FSOS_R(crate::FieldReader<u8, FSOS_A>);
217impl FSOS_R {
218 #[inline(always)]
219 pub(crate) fn new(bits: u8) -> Self {
220 FSOS_R(crate::FieldReader::new(bits))
221 }
222 #[doc = r"Get enumerated values variant"]
223 #[inline(always)]
224 pub fn variant(&self) -> Option<FSOS_A> {
225 match self.bits {
226 0 => Some(FSOS_A::NONE),
227 1 => Some(FSOS_A::NEGATIVE),
228 2 => Some(FSOS_A::POSITIVE),
229 3 => Some(FSOS_A::LOW),
230 4 => Some(FSOS_A::HIGH),
231 5 => Some(FSOS_A::TOGGLING),
232 _ => None,
233 }
234 }
235 #[doc = "Checks if the value of the field is `NONE`"]
236 #[inline(always)]
237 pub fn is_none(&self) -> bool {
238 **self == FSOS_A::NONE
239 }
240 #[doc = "Checks if the value of the field is `NEGATIVE`"]
241 #[inline(always)]
242 pub fn is_negative(&self) -> bool {
243 **self == FSOS_A::NEGATIVE
244 }
245 #[doc = "Checks if the value of the field is `POSITIVE`"]
246 #[inline(always)]
247 pub fn is_positive(&self) -> bool {
248 **self == FSOS_A::POSITIVE
249 }
250 #[doc = "Checks if the value of the field is `LOW`"]
251 #[inline(always)]
252 pub fn is_low(&self) -> bool {
253 **self == FSOS_A::LOW
254 }
255 #[doc = "Checks if the value of the field is `HIGH`"]
256 #[inline(always)]
257 pub fn is_high(&self) -> bool {
258 **self == FSOS_A::HIGH
259 }
260 #[doc = "Checks if the value of the field is `TOGGLING`"]
261 #[inline(always)]
262 pub fn is_toggling(&self) -> bool {
263 **self == FSOS_A::TOGGLING
264 }
265}
266impl core::ops::Deref for FSOS_R {
267 type Target = crate::FieldReader<u8, FSOS_A>;
268 #[inline(always)]
269 fn deref(&self) -> &Self::Target {
270 &self.0
271 }
272}
273#[doc = "Field `FSOS` writer - Receive Frame Sync Output Selection"]
274pub struct FSOS_W<'a> {
275 w: &'a mut W,
276}
277impl<'a> FSOS_W<'a> {
278 #[doc = r"Writes `variant` to the field"]
279 #[inline(always)]
280 pub fn variant(self, variant: FSOS_A) -> &'a mut W {
281 unsafe { self.bits(variant.into()) }
282 }
283 #[doc = "None, RF pin is an input"]
284 #[inline(always)]
285 pub fn none(self) -> &'a mut W {
286 self.variant(FSOS_A::NONE)
287 }
288 #[doc = "Negative Pulse, RF pin is an output"]
289 #[inline(always)]
290 pub fn negative(self) -> &'a mut W {
291 self.variant(FSOS_A::NEGATIVE)
292 }
293 #[doc = "Positive Pulse, RF pin is an output"]
294 #[inline(always)]
295 pub fn positive(self) -> &'a mut W {
296 self.variant(FSOS_A::POSITIVE)
297 }
298 #[doc = "Driven Low during data transfer, RF pin is an output"]
299 #[inline(always)]
300 pub fn low(self) -> &'a mut W {
301 self.variant(FSOS_A::LOW)
302 }
303 #[doc = "Driven High during data transfer, RF pin is an output"]
304 #[inline(always)]
305 pub fn high(self) -> &'a mut W {
306 self.variant(FSOS_A::HIGH)
307 }
308 #[doc = "Toggling at each start of data transfer, RF pin is an output"]
309 #[inline(always)]
310 pub fn toggling(self) -> &'a mut W {
311 self.variant(FSOS_A::TOGGLING)
312 }
313 #[doc = r"Writes raw bits to the field"]
314 #[inline(always)]
315 pub unsafe fn bits(self, value: u8) -> &'a mut W {
316 self.w.bits = (self.w.bits & !(0x07 << 20)) | ((value as u32 & 0x07) << 20);
317 self.w
318 }
319}
320#[doc = "Frame Sync Edge Detection\n\nValue on reset: 0"]
321#[derive(Clone, Copy, Debug, PartialEq)]
322pub enum FSEDGE_A {
323 #[doc = "0: Positive Edge Detection"]
324 POSITIVE = 0,
325 #[doc = "1: Negative Edge Detection"]
326 NEGATIVE = 1,
327}
328impl From<FSEDGE_A> for bool {
329 #[inline(always)]
330 fn from(variant: FSEDGE_A) -> Self {
331 variant as u8 != 0
332 }
333}
334#[doc = "Field `FSEDGE` reader - Frame Sync Edge Detection"]
335pub struct FSEDGE_R(crate::FieldReader<bool, FSEDGE_A>);
336impl FSEDGE_R {
337 #[inline(always)]
338 pub(crate) fn new(bits: bool) -> Self {
339 FSEDGE_R(crate::FieldReader::new(bits))
340 }
341 #[doc = r"Get enumerated values variant"]
342 #[inline(always)]
343 pub fn variant(&self) -> FSEDGE_A {
344 match self.bits {
345 false => FSEDGE_A::POSITIVE,
346 true => FSEDGE_A::NEGATIVE,
347 }
348 }
349 #[doc = "Checks if the value of the field is `POSITIVE`"]
350 #[inline(always)]
351 pub fn is_positive(&self) -> bool {
352 **self == FSEDGE_A::POSITIVE
353 }
354 #[doc = "Checks if the value of the field is `NEGATIVE`"]
355 #[inline(always)]
356 pub fn is_negative(&self) -> bool {
357 **self == FSEDGE_A::NEGATIVE
358 }
359}
360impl core::ops::Deref for FSEDGE_R {
361 type Target = crate::FieldReader<bool, FSEDGE_A>;
362 #[inline(always)]
363 fn deref(&self) -> &Self::Target {
364 &self.0
365 }
366}
367#[doc = "Field `FSEDGE` writer - Frame Sync Edge Detection"]
368pub struct FSEDGE_W<'a> {
369 w: &'a mut W,
370}
371impl<'a> FSEDGE_W<'a> {
372 #[doc = r"Writes `variant` to the field"]
373 #[inline(always)]
374 pub fn variant(self, variant: FSEDGE_A) -> &'a mut W {
375 self.bit(variant.into())
376 }
377 #[doc = "Positive Edge Detection"]
378 #[inline(always)]
379 pub fn positive(self) -> &'a mut W {
380 self.variant(FSEDGE_A::POSITIVE)
381 }
382 #[doc = "Negative Edge Detection"]
383 #[inline(always)]
384 pub fn negative(self) -> &'a mut W {
385 self.variant(FSEDGE_A::NEGATIVE)
386 }
387 #[doc = r"Sets the field bit"]
388 #[inline(always)]
389 pub fn set_bit(self) -> &'a mut W {
390 self.bit(true)
391 }
392 #[doc = r"Clears the field bit"]
393 #[inline(always)]
394 pub fn clear_bit(self) -> &'a mut W {
395 self.bit(false)
396 }
397 #[doc = r"Writes raw bits to the field"]
398 #[inline(always)]
399 pub fn bit(self, value: bool) -> &'a mut W {
400 self.w.bits = (self.w.bits & !(0x01 << 24)) | ((value as u32 & 0x01) << 24);
401 self.w
402 }
403}
404#[doc = "Field `FSLEN_EXT` reader - FSLEN Field Extension"]
405pub struct FSLEN_EXT_R(crate::FieldReader<u8, u8>);
406impl FSLEN_EXT_R {
407 #[inline(always)]
408 pub(crate) fn new(bits: u8) -> Self {
409 FSLEN_EXT_R(crate::FieldReader::new(bits))
410 }
411}
412impl core::ops::Deref for FSLEN_EXT_R {
413 type Target = crate::FieldReader<u8, u8>;
414 #[inline(always)]
415 fn deref(&self) -> &Self::Target {
416 &self.0
417 }
418}
419#[doc = "Field `FSLEN_EXT` writer - FSLEN Field Extension"]
420pub struct FSLEN_EXT_W<'a> {
421 w: &'a mut W,
422}
423impl<'a> FSLEN_EXT_W<'a> {
424 #[doc = r"Writes raw bits to the field"]
425 #[inline(always)]
426 pub unsafe fn bits(self, value: u8) -> &'a mut W {
427 self.w.bits = (self.w.bits & !(0x0f << 28)) | ((value as u32 & 0x0f) << 28);
428 self.w
429 }
430}
431impl R {
432 #[doc = "Bits 0:4 - Data Length"]
433 #[inline(always)]
434 pub fn datlen(&self) -> DATLEN_R {
435 DATLEN_R::new((self.bits & 0x1f) as u8)
436 }
437 #[doc = "Bit 5 - Loop Mode"]
438 #[inline(always)]
439 pub fn loop_(&self) -> LOOP_R {
440 LOOP_R::new(((self.bits >> 5) & 0x01) != 0)
441 }
442 #[doc = "Bit 7 - Most Significant Bit First"]
443 #[inline(always)]
444 pub fn msbf(&self) -> MSBF_R {
445 MSBF_R::new(((self.bits >> 7) & 0x01) != 0)
446 }
447 #[doc = "Bits 8:11 - Data Number per Frame"]
448 #[inline(always)]
449 pub fn datnb(&self) -> DATNB_R {
450 DATNB_R::new(((self.bits >> 8) & 0x0f) as u8)
451 }
452 #[doc = "Bits 16:19 - Receive Frame Sync Length"]
453 #[inline(always)]
454 pub fn fslen(&self) -> FSLEN_R {
455 FSLEN_R::new(((self.bits >> 16) & 0x0f) as u8)
456 }
457 #[doc = "Bits 20:22 - Receive Frame Sync Output Selection"]
458 #[inline(always)]
459 pub fn fsos(&self) -> FSOS_R {
460 FSOS_R::new(((self.bits >> 20) & 0x07) as u8)
461 }
462 #[doc = "Bit 24 - Frame Sync Edge Detection"]
463 #[inline(always)]
464 pub fn fsedge(&self) -> FSEDGE_R {
465 FSEDGE_R::new(((self.bits >> 24) & 0x01) != 0)
466 }
467 #[doc = "Bits 28:31 - FSLEN Field Extension"]
468 #[inline(always)]
469 pub fn fslen_ext(&self) -> FSLEN_EXT_R {
470 FSLEN_EXT_R::new(((self.bits >> 28) & 0x0f) as u8)
471 }
472}
473impl W {
474 #[doc = "Bits 0:4 - Data Length"]
475 #[inline(always)]
476 pub fn datlen(&mut self) -> DATLEN_W {
477 DATLEN_W { w: self }
478 }
479 #[doc = "Bit 5 - Loop Mode"]
480 #[inline(always)]
481 pub fn loop_(&mut self) -> LOOP_W {
482 LOOP_W { w: self }
483 }
484 #[doc = "Bit 7 - Most Significant Bit First"]
485 #[inline(always)]
486 pub fn msbf(&mut self) -> MSBF_W {
487 MSBF_W { w: self }
488 }
489 #[doc = "Bits 8:11 - Data Number per Frame"]
490 #[inline(always)]
491 pub fn datnb(&mut self) -> DATNB_W {
492 DATNB_W { w: self }
493 }
494 #[doc = "Bits 16:19 - Receive Frame Sync Length"]
495 #[inline(always)]
496 pub fn fslen(&mut self) -> FSLEN_W {
497 FSLEN_W { w: self }
498 }
499 #[doc = "Bits 20:22 - Receive Frame Sync Output Selection"]
500 #[inline(always)]
501 pub fn fsos(&mut self) -> FSOS_W {
502 FSOS_W { w: self }
503 }
504 #[doc = "Bit 24 - Frame Sync Edge Detection"]
505 #[inline(always)]
506 pub fn fsedge(&mut self) -> FSEDGE_W {
507 FSEDGE_W { w: self }
508 }
509 #[doc = "Bits 28:31 - FSLEN Field Extension"]
510 #[inline(always)]
511 pub fn fslen_ext(&mut self) -> FSLEN_EXT_W {
512 FSLEN_EXT_W { w: self }
513 }
514 #[doc = "Writes raw bits to the register."]
515 #[inline(always)]
516 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
517 self.0.bits(bits);
518 self
519 }
520}
521#[doc = "Receive Frame Mode Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ssc_rfmr](index.html) module"]
522pub struct SSC_RFMR_SPEC;
523impl crate::RegisterSpec for SSC_RFMR_SPEC {
524 type Ux = u32;
525}
526#[doc = "`read()` method returns [ssc_rfmr::R](R) reader structure"]
527impl crate::Readable for SSC_RFMR_SPEC {
528 type Reader = R;
529}
530#[doc = "`write(|w| ..)` method takes [ssc_rfmr::W](W) writer structure"]
531impl crate::Writable for SSC_RFMR_SPEC {
532 type Writer = W;
533}
534#[doc = "`reset()` method sets SSC_RFMR to value 0"]
535impl crate::Resettable for SSC_RFMR_SPEC {
536 #[inline(always)]
537 fn reset_value() -> Self::Ux {
538 0
539 }
540}