[][src]Type Definition atsame70q19b::usbhs::usbhs_devifr::W

type W = W<u32, USBHS_DEVIFR>;

Writer for register USBHS_DEVIFR

Implementations

impl W[src]

pub fn susps(&mut self) -> SUSPS_W[src]

Bit 0 - Suspend Interrupt Set

pub fn msofs(&mut self) -> MSOFS_W[src]

Bit 1 - Micro Start of Frame Interrupt Set

pub fn sofs(&mut self) -> SOFS_W[src]

Bit 2 - Start of Frame Interrupt Set

pub fn eorsts(&mut self) -> EORSTS_W[src]

Bit 3 - End of Reset Interrupt Set

pub fn wakeups(&mut self) -> WAKEUPS_W[src]

Bit 4 - Wake-Up Interrupt Set

pub fn eorsms(&mut self) -> EORSMS_W[src]

Bit 5 - End of Resume Interrupt Set

pub fn uprsms(&mut self) -> UPRSMS_W[src]

Bit 6 - Upstream Resume Interrupt Set

pub fn dma_1(&mut self) -> DMA_1_W[src]

Bit 25 - DMA Channel 1 Interrupt Set

pub fn dma_2(&mut self) -> DMA_2_W[src]

Bit 26 - DMA Channel 2 Interrupt Set

pub fn dma_3(&mut self) -> DMA_3_W[src]

Bit 27 - DMA Channel 3 Interrupt Set

pub fn dma_4(&mut self) -> DMA_4_W[src]

Bit 28 - DMA Channel 4 Interrupt Set

pub fn dma_5(&mut self) -> DMA_5_W[src]

Bit 29 - DMA Channel 5 Interrupt Set

pub fn dma_6(&mut self) -> DMA_6_W[src]

Bit 30 - DMA Channel 6 Interrupt Set

pub fn dma_7(&mut self) -> DMA_7_W[src]

Bit 31 - DMA Channel 7 Interrupt Set