Enum atsame70q19b::usart0::us_mr_spi_mode::USCLKS_A

#[repr(u8)]pub enum USCLKS_A {
    MCK,
    DIV,
    PCK,
    SCK,
}

Clock Selection

Value on reset: 0

Variants

MCK

0: Peripheral clock is selected

DIV

1: Peripheral clock divided (DIV = 8) is selected

PCK

2: PMC programmable clock (PCK) is selected. If the SCK pin is driven (CLKO = 1), the CD field must be greater than 1.

SCK

3: Serial clock (SCK) is selected

Trait Implementations

impl Clone for USCLKS_A

fn clone(&self) -> USCLKS_A

Returns a copy of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Copy for USCLKS_A

impl Debug for USCLKS_A

fn fmt(&self, f: &mut Formatter) -> Result

Formats the value using the given formatter.

impl From<USCLKS_A> for u8

fn from(variant: USCLKS_A) -> Self

Performs the conversion.

impl PartialEq<USCLKS_A> for USCLKS_A

fn eq(&self, other: &USCLKS_A) -> bool

This method tests for self and other values to be equal, and is used by ==.

#[must_use]fn ne(&self, other: &Rhs) -> bool

This method tests for !=.

impl StructuralPartialEq for USCLKS_A