[][src]Type Definition atsame70q19b::pwm0::pwm_idr2::W

type W = W<u32, PWM_IDR2>;

Writer for register PWM_IDR2

Implementations

impl W[src]

pub fn wrdy(&mut self) -> WRDY_W[src]

Bit 0 - Write Ready for Synchronous Channels Update Interrupt Disable

pub fn unre(&mut self) -> UNRE_W[src]

Bit 3 - Synchronous Channels Update Underrun Error Interrupt Disable

pub fn cmpm0(&mut self) -> CMPM0_W[src]

Bit 8 - Comparison 0 Match Interrupt Disable

pub fn cmpm1(&mut self) -> CMPM1_W[src]

Bit 9 - Comparison 1 Match Interrupt Disable

pub fn cmpm2(&mut self) -> CMPM2_W[src]

Bit 10 - Comparison 2 Match Interrupt Disable

pub fn cmpm3(&mut self) -> CMPM3_W[src]

Bit 11 - Comparison 3 Match Interrupt Disable

pub fn cmpm4(&mut self) -> CMPM4_W[src]

Bit 12 - Comparison 4 Match Interrupt Disable

pub fn cmpm5(&mut self) -> CMPM5_W[src]

Bit 13 - Comparison 5 Match Interrupt Disable

pub fn cmpm6(&mut self) -> CMPM6_W[src]

Bit 14 - Comparison 6 Match Interrupt Disable

pub fn cmpm7(&mut self) -> CMPM7_W[src]

Bit 15 - Comparison 7 Match Interrupt Disable

pub fn cmpu0(&mut self) -> CMPU0_W[src]

Bit 16 - Comparison 0 Update Interrupt Disable

pub fn cmpu1(&mut self) -> CMPU1_W[src]

Bit 17 - Comparison 1 Update Interrupt Disable

pub fn cmpu2(&mut self) -> CMPU2_W[src]

Bit 18 - Comparison 2 Update Interrupt Disable

pub fn cmpu3(&mut self) -> CMPU3_W[src]

Bit 19 - Comparison 3 Update Interrupt Disable

pub fn cmpu4(&mut self) -> CMPU4_W[src]

Bit 20 - Comparison 4 Update Interrupt Disable

pub fn cmpu5(&mut self) -> CMPU5_W[src]

Bit 21 - Comparison 5 Update Interrupt Disable

pub fn cmpu6(&mut self) -> CMPU6_W[src]

Bit 22 - Comparison 6 Update Interrupt Disable

pub fn cmpu7(&mut self) -> CMPU7_W[src]

Bit 23 - Comparison 7 Update Interrupt Disable