[][src]Type Definition atsame70q19b::mcan0::mcan_cccr::W

type W = W<u32, MCAN_CCCR>;

Writer for register MCAN_CCCR

Implementations

impl W[src]

pub fn init(&mut self) -> INIT_W[src]

Bit 0 - Initialization (read/write)

pub fn cce(&mut self) -> CCE_W[src]

Bit 1 - Configuration Change Enable (read/write, write protection)

pub fn asm(&mut self) -> ASM_W[src]

Bit 2 - Restricted Operation Mode (read/write, write protection against '1')

pub fn csa(&mut self) -> CSA_W[src]

Bit 3 - Clock Stop Acknowledge (read-only)

pub fn csr(&mut self) -> CSR_W[src]

Bit 4 - Clock Stop Request (read/write)

pub fn mon(&mut self) -> MON_W[src]

Bit 5 - Bus Monitoring Mode (read/write, write protection against '1')

pub fn dar(&mut self) -> DAR_W[src]

Bit 6 - Disable Automatic Retransmission (read/write, write protection)

pub fn test(&mut self) -> TEST_W[src]

Bit 7 - Test Mode Enable (read/write, write protection against '1')

pub fn fdoe(&mut self) -> FDOE_W[src]

Bit 8 - CAN FD Operation Enable (read/write, write protection)

pub fn brse(&mut self) -> BRSE_W[src]

Bit 9 - Bit Rate Switching Enable (read/write, write protection)

pub fn pxhd(&mut self) -> PXHD_W[src]

Bit 12 - Protocol Exception Event Handling (read/write, write protection)

pub fn efbi(&mut self) -> EFBI_W[src]

Bit 13 - Edge Filtering during Bus Integration (read/write, write protection)

pub fn txp(&mut self) -> TXP_W[src]

Bit 14 - Transmit Pause (read/write, write protection)

pub fn niso(&mut self) -> NISO_W[src]

Bit 15 - Non-ISO Operation