Enum atsame70n21b::xdmac::xdmac_chid::cc::PERIDSELECT_A

#[repr(u8)]
pub enum PERIDSELECT_A {
    HSMCI = 0,
    SPI0_TX = 1,
    SPI0_RX = 2,
    QSPI_TX = 5,
    QSPI_RX = 6,
    USART0_TX = 7,
    USART0_RX = 8,
    USART1_TX = 9,
    USART1_RX = 10,
    USART2_TX = 11,
    USART2_RX = 12,
    PWM0 = 13,
    TWIHS0_TX = 14,
    TWIHS0_RX = 15,
    TWIHS1_TX = 16,
    TWIHS1_RX = 17,
    TWIHS2_TX = 18,
    TWIHS2_RX = 19,
    UART0_TX = 20,
    UART0_RX = 21,
    UART1_TX = 22,
    UART1_RX = 23,
    UART2_TX = 24,
    UART2_RX = 25,
    UART3_TX = 26,
    UART3_RX = 27,
    UART4_TX = 28,
    UART4_RX = 29,
    DACC0 = 30,
    DACC1 = 31,
    SSC_TX = 32,
    SSC_RX = 33,
    PIOA = 34,
    AFEC0 = 35,
    AFEC1 = 36,
    AES_TX = 37,
    AES_RX = 38,
    PWM1 = 39,
    TC0 = 40,
    TC3 = 41,
    TC6 = 42,
    TC9 = 43,
    I2SC0_TX_LEFT = 44,
    I2SC0_RX_LEFT = 45,
    I2SC0_TX_RIGHT = 48,
    I2SC0_RX_RIGHT = 49,
}

Channel x Peripheral Hardware Request Line Identifier

Value on reset: 0

Variants

HSMCI = 0

0: HSMCI

SPI0_TX = 1

1: SPI0_TX

SPI0_RX = 2

2: SPI0_RX

QSPI_TX = 5

5: QSPI_TX

QSPI_RX = 6

6: QSPI_RX

USART0_TX = 7

7: USART0_TX

USART0_RX = 8

8: USART0_RX

USART1_TX = 9

9: USART1_TX

USART1_RX = 10

10: USART1_RX

USART2_TX = 11

11: USART2_TX

USART2_RX = 12

12: USART2_RX

PWM0 = 13

13: PWM0

TWIHS0_TX = 14

14: TWIHS0_TX

TWIHS0_RX = 15

15: TWIHS0_RX

TWIHS1_TX = 16

16: TWIHS1_TX

TWIHS1_RX = 17

17: TWIHS1_RX

TWIHS2_TX = 18

18: TWIHS2_TX

TWIHS2_RX = 19

19: TWIHS2_RX

UART0_TX = 20

20: UART0_TX

UART0_RX = 21

21: UART0_RX

UART1_TX = 22

22: UART1_TX

UART1_RX = 23

23: UART1_RX

UART2_TX = 24

24: UART2_TX

UART2_RX = 25

25: UART2_RX

UART3_TX = 26

26: UART3_TX

UART3_RX = 27

27: UART3_RX

UART4_TX = 28

28: UART4_TX

UART4_RX = 29

29: UART4_RX

DACC0 = 30

30: DACC0

DACC1 = 31

31: DACC1

SSC_TX = 32

32: SSC_TX

SSC_RX = 33

33: SSC_RX

PIOA = 34

34: PIOA

AFEC0 = 35

35: AFEC0

AFEC1 = 36

36: AFEC1

AES_TX = 37

37: AES_TX

AES_RX = 38

38: AES_RX

PWM1 = 39

39: PWM1

TC0 = 40

40: TC0

TC3 = 41

41: TC3

TC6 = 42

42: TC6

TC9 = 43

43: TC9

I2SC0_TX_LEFT = 44

44: I2SC0_TX_LEFT

I2SC0_RX_LEFT = 45

45: I2SC0_RX_LEFT

I2SC0_TX_RIGHT = 48

48: I2SC0_TX_RIGHT

I2SC0_RX_RIGHT = 49

49: I2SC0_RX_RIGHT

Trait Implementations

impl Clone for PERIDSELECT_A

fn clone(&self) -> PERIDSELECT_A

Returns a copy of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Debug for PERIDSELECT_A

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl FieldSpec for PERIDSELECT_A

type Ux = u8

Raw field type (u8, u16, u32, …).

impl From<PERIDSELECT_A> for u8

fn from(variant: PERIDSELECT_A) -> Self

Converts to this type from the input type.

impl PartialEq for PERIDSELECT_A

fn eq(&self, other: &PERIDSELECT_A) -> bool

This method tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

This method tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl Copy for PERIDSELECT_A

impl Eq for PERIDSELECT_A

impl StructuralEq for PERIDSELECT_A

impl StructuralPartialEq for PERIDSELECT_A