#[repr(u8)]
pub enum ULBTSELECT_A {
    UNLTD_LENGTH,
    SINGLE_ACCESS,
    _4BEAT_BURST,
    _8BEAT_BURST,
    _16BEAT_BURST,
    _32BEAT_BURST,
    _64BEAT_BURST,
    _128BEAT_BURST,
}
Expand description

Undefined Length Burst Type

Value on reset: 0

Variants

UNLTD_LENGTH

0: Unlimited Length Burst-No predicted end of burst is generated, therefore INCR bursts coming from this master can only be broken if the Slave Slot Cycle Limit is reached. If the Slot Cycle Limit is not reached, the burst is normally completed by the master, at the latest, on the next AHB 1-Kbyte address boundary, allowing up to 256-beat word bursts or 128-beat double-word bursts.This value should not be used in the very particular case of a master capable of performing back-to-back undefined length bursts on a single slave, since this could indefinitely freeze the slave arbitration and thus prevent another master from accessing this slave.

SINGLE_ACCESS

1: Single Access-The undefined length burst is treated as a succession of single accesses, allowing re-arbitration at each beat of the INCR burst or bursts sequence.

_4BEAT_BURST

2: 4-beat Burst-The undefined length burst or bursts sequence is split into 4-beat bursts or less, allowing re-arbitration every 4 beats.

_8BEAT_BURST

3: 8-beat Burst-The undefined length burst or bursts sequence is split into 8-beat bursts or less, allowing re-arbitration every 8 beats.

_16BEAT_BURST

4: 16-beat Burst-The undefined length burst or bursts sequence is split into 16-beat bursts or less, allowing re-arbitration every 16 beats.

_32BEAT_BURST

5: 32-beat Burst -The undefined length burst or bursts sequence is split into 32-beat bursts or less, allowing re-arbitration every 32 beats.

_64BEAT_BURST

6: 64-beat Burst-The undefined length burst or bursts sequence is split into 64-beat bursts or less, allowing re-arbitration every 64 beats.

_128BEAT_BURST

7: 128-beat Burst-The undefined length burst or bursts sequence is split into 128-beat bursts or less, allowing re-arbitration every 128 beats.

Trait Implementations

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