[][src]Type Definition atsame70n20b::afec0::afec_imr::R

type R = R<u32, AFEC_IMR>;

Reader of register AFEC_IMR

Implementations

impl R[src]

pub fn eoc0(&self) -> EOC0_R[src]

Bit 0 - End of Conversion Interrupt Mask 0

pub fn eoc1(&self) -> EOC1_R[src]

Bit 1 - End of Conversion Interrupt Mask 1

pub fn eoc2(&self) -> EOC2_R[src]

Bit 2 - End of Conversion Interrupt Mask 2

pub fn eoc3(&self) -> EOC3_R[src]

Bit 3 - End of Conversion Interrupt Mask 3

pub fn eoc4(&self) -> EOC4_R[src]

Bit 4 - End of Conversion Interrupt Mask 4

pub fn eoc5(&self) -> EOC5_R[src]

Bit 5 - End of Conversion Interrupt Mask 5

pub fn eoc6(&self) -> EOC6_R[src]

Bit 6 - End of Conversion Interrupt Mask 6

pub fn eoc7(&self) -> EOC7_R[src]

Bit 7 - End of Conversion Interrupt Mask 7

pub fn eoc8(&self) -> EOC8_R[src]

Bit 8 - End of Conversion Interrupt Mask 8

pub fn eoc9(&self) -> EOC9_R[src]

Bit 9 - End of Conversion Interrupt Mask 9

pub fn eoc10(&self) -> EOC10_R[src]

Bit 10 - End of Conversion Interrupt Mask 10

pub fn eoc11(&self) -> EOC11_R[src]

Bit 11 - End of Conversion Interrupt Mask 11

pub fn drdy(&self) -> DRDY_R[src]

Bit 24 - Data Ready Interrupt Mask

pub fn govre(&self) -> GOVRE_R[src]

Bit 25 - General Overrun Error Interrupt Mask

pub fn compe(&self) -> COMPE_R[src]

Bit 26 - Comparison Event Interrupt Mask

pub fn tempchg(&self) -> TEMPCHG_R[src]

Bit 30 - Temperature Change Interrupt Mask