Type Definition atsame70n20b_pac::pwm0::CLK

type CLK = Reg<u32, _CLK>;

PWM Clock Register

This register you can read, reset, write, write_with_zero, modify. See API.

For information about available fields see clk module

Trait Implementations

impl Readable for CLK

read() method returns clk::R reader structure

impl ResetValue for CLK

Register CLK reset()’s with value 0

type Type = u32

Raw register type (u8, u16, u32, …).

fn reset_value() -> Self::Type

Reset value of the register.

impl Writable for CLK

write(|w| ..) method takes clk::W writer structure