[][src]Type Definition atsame70j21b::usbhs::usbhs_devimr::R

type R = R<u32, USBHS_DEVIMR>;

Reader of register USBHS_DEVIMR

Implementations

impl R[src]

pub fn suspe(&self) -> SUSPE_R[src]

Bit 0 - Suspend Interrupt Mask

pub fn msofe(&self) -> MSOFE_R[src]

Bit 1 - Micro Start of Frame Interrupt Mask

pub fn sofe(&self) -> SOFE_R[src]

Bit 2 - Start of Frame Interrupt Mask

pub fn eorste(&self) -> EORSTE_R[src]

Bit 3 - End of Reset Interrupt Mask

pub fn wakeupe(&self) -> WAKEUPE_R[src]

Bit 4 - Wake-Up Interrupt Mask

pub fn eorsme(&self) -> EORSME_R[src]

Bit 5 - End of Resume Interrupt Mask

pub fn uprsme(&self) -> UPRSME_R[src]

Bit 6 - Upstream Resume Interrupt Mask

pub fn pep_0(&self) -> PEP_0_R[src]

Bit 12 - Endpoint 0 Interrupt Mask

pub fn pep_1(&self) -> PEP_1_R[src]

Bit 13 - Endpoint 1 Interrupt Mask

pub fn pep_2(&self) -> PEP_2_R[src]

Bit 14 - Endpoint 2 Interrupt Mask

pub fn pep_3(&self) -> PEP_3_R[src]

Bit 15 - Endpoint 3 Interrupt Mask

pub fn pep_4(&self) -> PEP_4_R[src]

Bit 16 - Endpoint 4 Interrupt Mask

pub fn pep_5(&self) -> PEP_5_R[src]

Bit 17 - Endpoint 5 Interrupt Mask

pub fn pep_6(&self) -> PEP_6_R[src]

Bit 18 - Endpoint 6 Interrupt Mask

pub fn pep_7(&self) -> PEP_7_R[src]

Bit 19 - Endpoint 7 Interrupt Mask

pub fn pep_8(&self) -> PEP_8_R[src]

Bit 20 - Endpoint 8 Interrupt Mask

pub fn pep_9(&self) -> PEP_9_R[src]

Bit 21 - Endpoint 9 Interrupt Mask

pub fn dma_1(&self) -> DMA_1_R[src]

Bit 25 - DMA Channel 1 Interrupt Mask

pub fn dma_2(&self) -> DMA_2_R[src]

Bit 26 - DMA Channel 2 Interrupt Mask

pub fn dma_3(&self) -> DMA_3_R[src]

Bit 27 - DMA Channel 3 Interrupt Mask

pub fn dma_4(&self) -> DMA_4_R[src]

Bit 28 - DMA Channel 4 Interrupt Mask

pub fn dma_5(&self) -> DMA_5_R[src]

Bit 29 - DMA Channel 5 Interrupt Mask

pub fn dma_6(&self) -> DMA_6_R[src]

Bit 30 - DMA Channel 6 Interrupt Mask

pub fn dma_7(&self) -> DMA_7_R[src]

Bit 31 - DMA Channel 7 Interrupt Mask