[][src]Type Definition atsame70j21b::twihs0::twihs_imr::R

type R = R<u32, TWIHS_IMR>;

Reader of register TWIHS_IMR

Implementations

impl R[src]

pub fn txcomp(&self) -> TXCOMP_R[src]

Bit 0 - Transmission Completed Interrupt Mask

pub fn rxrdy(&self) -> RXRDY_R[src]

Bit 1 - Receive Holding Register Ready Interrupt Mask

pub fn txrdy(&self) -> TXRDY_R[src]

Bit 2 - Transmit Holding Register Ready Interrupt Mask

pub fn svacc(&self) -> SVACC_R[src]

Bit 4 - Slave Access Interrupt Mask

pub fn gacc(&self) -> GACC_R[src]

Bit 5 - General Call Access Interrupt Mask

pub fn ovre(&self) -> OVRE_R[src]

Bit 6 - Overrun Error Interrupt Mask

pub fn unre(&self) -> UNRE_R[src]

Bit 7 - Underrun Error Interrupt Mask

pub fn nack(&self) -> NACK_R[src]

Bit 8 - Not Acknowledge Interrupt Mask

pub fn arblst(&self) -> ARBLST_R[src]

Bit 9 - Arbitration Lost Interrupt Mask

pub fn scl_ws(&self) -> SCL_WS_R[src]

Bit 10 - Clock Wait State Interrupt Mask

pub fn eosacc(&self) -> EOSACC_R[src]

Bit 11 - End Of Slave Access Interrupt Mask

pub fn mcack(&self) -> MCACK_R[src]

Bit 16 - Master Code Acknowledge Interrupt Mask

pub fn tout(&self) -> TOUT_R[src]

Bit 18 - Timeout Error Interrupt Mask

pub fn pecerr(&self) -> PECERR_R[src]

Bit 19 - PEC Error Interrupt Mask

pub fn smbdam(&self) -> SMBDAM_R[src]

Bit 20 - SMBus Default Address Match Interrupt Mask

pub fn smbhhm(&self) -> SMBHHM_R[src]

Bit 21 - SMBus Host Header Address Match Interrupt Mask