[−][src]Struct atsame70j21b::mcan0::RegisterBlock

#[repr(C)]pub struct RegisterBlock {
    pub mcan_crel: MCAN_CREL,
    pub mcan_endn: MCAN_ENDN,
    pub mcan_cust: MCAN_CUST,
    pub mcan_dbtp: MCAN_DBTP,
    pub mcan_test: MCAN_TEST,
    pub mcan_rwd: MCAN_RWD,
    pub mcan_cccr: MCAN_CCCR,
    pub mcan_nbtp: MCAN_NBTP,
    pub mcan_tscc: MCAN_TSCC,
    pub mcan_tscv: MCAN_TSCV,
    pub mcan_tocc: MCAN_TOCC,
    pub mcan_tocv: MCAN_TOCV,
    pub mcan_ecr: MCAN_ECR,
    pub mcan_psr: MCAN_PSR,
    pub mcan_tdcr: MCAN_TDCR,
    pub mcan_ir: MCAN_IR,
    pub mcan_ie: MCAN_IE,
    pub mcan_ils: MCAN_ILS,
    pub mcan_ile: MCAN_ILE,
    pub mcan_gfc: MCAN_GFC,
    pub mcan_sidfc: MCAN_SIDFC,
    pub mcan_xidfc: MCAN_XIDFC,
    pub mcan_xidam: MCAN_XIDAM,
    pub mcan_hpms: MCAN_HPMS,
    pub mcan_ndat1: MCAN_NDAT1,
    pub mcan_ndat2: MCAN_NDAT2,
    pub mcan_rxf0c: MCAN_RXF0C,
    pub mcan_rxf0s: MCAN_RXF0S,
    pub mcan_rxf0a: MCAN_RXF0A,
    pub mcan_rxbc: MCAN_RXBC,
    pub mcan_rxf1c: MCAN_RXF1C,
    pub mcan_rxf1s: MCAN_RXF1S,
    pub mcan_rxf1a: MCAN_RXF1A,
    pub mcan_rxesc: MCAN_RXESC,
    pub mcan_txbc: MCAN_TXBC,
    pub mcan_txfqs: MCAN_TXFQS,
    pub mcan_txesc: MCAN_TXESC,
    pub mcan_txbrp: MCAN_TXBRP,
    pub mcan_txbar: MCAN_TXBAR,
    pub mcan_txbcr: MCAN_TXBCR,
    pub mcan_txbto: MCAN_TXBTO,
    pub mcan_txbcf: MCAN_TXBCF,
    pub mcan_txbtie: MCAN_TXBTIE,
    pub mcan_txbcie: MCAN_TXBCIE,
    pub mcan_txefc: MCAN_TXEFC,
    pub mcan_txefs: MCAN_TXEFS,
    pub mcan_txefa: MCAN_TXEFA,
    // some fields omitted
}

Register block

Fields

mcan_crel: MCAN_CREL

0x00 - Core Release Register

mcan_endn: MCAN_ENDN

0x04 - Endian Register

mcan_cust: MCAN_CUST

0x08 - Customer Register

mcan_dbtp: MCAN_DBTP

0x0c - Data Bit Timing and Prescaler Register

mcan_test: MCAN_TEST

0x10 - Test Register

mcan_rwd: MCAN_RWD

0x14 - RAM Watchdog Register

mcan_cccr: MCAN_CCCR

0x18 - CC Control Register

mcan_nbtp: MCAN_NBTP

0x1c - Nominal Bit Timing and Prescaler Register

mcan_tscc: MCAN_TSCC

0x20 - Timestamp Counter Configuration Register

mcan_tscv: MCAN_TSCV

0x24 - Timestamp Counter Value Register

mcan_tocc: MCAN_TOCC

0x28 - Timeout Counter Configuration Register

mcan_tocv: MCAN_TOCV

0x2c - Timeout Counter Value Register

mcan_ecr: MCAN_ECR

0x40 - Error Counter Register

mcan_psr: MCAN_PSR

0x44 - Protocol Status Register

mcan_tdcr: MCAN_TDCR

0x48 - Transmit Delay Compensation Register

mcan_ir: MCAN_IR

0x50 - Interrupt Register

mcan_ie: MCAN_IE

0x54 - Interrupt Enable Register

mcan_ils: MCAN_ILS

0x58 - Interrupt Line Select Register

mcan_ile: MCAN_ILE

0x5c - Interrupt Line Enable Register

mcan_gfc: MCAN_GFC

0x80 - Global Filter Configuration Register

mcan_sidfc: MCAN_SIDFC

0x84 - Standard ID Filter Configuration Register

mcan_xidfc: MCAN_XIDFC

0x88 - Extended ID Filter Configuration Register

mcan_xidam: MCAN_XIDAM

0x90 - Extended ID AND Mask Register

mcan_hpms: MCAN_HPMS

0x94 - High Priority Message Status Register

mcan_ndat1: MCAN_NDAT1

0x98 - New Data 1 Register

mcan_ndat2: MCAN_NDAT2

0x9c - New Data 2 Register

mcan_rxf0c: MCAN_RXF0C

0xa0 - Receive FIFO 0 Configuration Register

mcan_rxf0s: MCAN_RXF0S

0xa4 - Receive FIFO 0 Status Register

mcan_rxf0a: MCAN_RXF0A

0xa8 - Receive FIFO 0 Acknowledge Register

mcan_rxbc: MCAN_RXBC

0xac - Receive Rx Buffer Configuration Register

mcan_rxf1c: MCAN_RXF1C

0xb0 - Receive FIFO 1 Configuration Register

mcan_rxf1s: MCAN_RXF1S

0xb4 - Receive FIFO 1 Status Register

mcan_rxf1a: MCAN_RXF1A

0xb8 - Receive FIFO 1 Acknowledge Register

mcan_rxesc: MCAN_RXESC

0xbc - Receive Buffer / FIFO Element Size Configuration Register

mcan_txbc: MCAN_TXBC

0xc0 - Transmit Buffer Configuration Register

mcan_txfqs: MCAN_TXFQS

0xc4 - Transmit FIFO/Queue Status Register

mcan_txesc: MCAN_TXESC

0xc8 - Transmit Buffer Element Size Configuration Register

mcan_txbrp: MCAN_TXBRP

0xcc - Transmit Buffer Request Pending Register

mcan_txbar: MCAN_TXBAR

0xd0 - Transmit Buffer Add Request Register

mcan_txbcr: MCAN_TXBCR

0xd4 - Transmit Buffer Cancellation Request Register

mcan_txbto: MCAN_TXBTO

0xd8 - Transmit Buffer Transmission Occurred Register

mcan_txbcf: MCAN_TXBCF

0xdc - Transmit Buffer Cancellation Finished Register

mcan_txbtie: MCAN_TXBTIE

0xe0 - Transmit Buffer Transmission Interrupt Enable Register

mcan_txbcie: MCAN_TXBCIE

0xe4 - Transmit Buffer Cancellation Finished Interrupt Enable Register

mcan_txefc: MCAN_TXEFC

0xf0 - Transmit Event FIFO Configuration Register

mcan_txefs: MCAN_TXEFS

0xf4 - Transmit Event FIFO Status Register

mcan_txefa: MCAN_TXEFA

0xf8 - Transmit Event FIFO Acknowledge Register

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