atsame70j21/pwm0/
pwm_oscupd.rs

1#[doc = "Register `PWM_OSCUPD` writer"]
2pub struct W(crate::W<PWM_OSCUPD_SPEC>);
3impl core::ops::Deref for W {
4    type Target = crate::W<PWM_OSCUPD_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl core::ops::DerefMut for W {
11    #[inline(always)]
12    fn deref_mut(&mut self) -> &mut Self::Target {
13        &mut self.0
14    }
15}
16impl From<crate::W<PWM_OSCUPD_SPEC>> for W {
17    #[inline(always)]
18    fn from(writer: crate::W<PWM_OSCUPD_SPEC>) -> Self {
19        W(writer)
20    }
21}
22#[doc = "Field `OSCUPH0` writer - Output Selection Clear for PWMH output of the channel 0"]
23pub struct OSCUPH0_W<'a> {
24    w: &'a mut W,
25}
26impl<'a> OSCUPH0_W<'a> {
27    #[doc = r"Sets the field bit"]
28    #[inline(always)]
29    pub fn set_bit(self) -> &'a mut W {
30        self.bit(true)
31    }
32    #[doc = r"Clears the field bit"]
33    #[inline(always)]
34    pub fn clear_bit(self) -> &'a mut W {
35        self.bit(false)
36    }
37    #[doc = r"Writes raw bits to the field"]
38    #[inline(always)]
39    pub fn bit(self, value: bool) -> &'a mut W {
40        self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01);
41        self.w
42    }
43}
44#[doc = "Field `OSCUPH1` writer - Output Selection Clear for PWMH output of the channel 1"]
45pub struct OSCUPH1_W<'a> {
46    w: &'a mut W,
47}
48impl<'a> OSCUPH1_W<'a> {
49    #[doc = r"Sets the field bit"]
50    #[inline(always)]
51    pub fn set_bit(self) -> &'a mut W {
52        self.bit(true)
53    }
54    #[doc = r"Clears the field bit"]
55    #[inline(always)]
56    pub fn clear_bit(self) -> &'a mut W {
57        self.bit(false)
58    }
59    #[doc = r"Writes raw bits to the field"]
60    #[inline(always)]
61    pub fn bit(self, value: bool) -> &'a mut W {
62        self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1);
63        self.w
64    }
65}
66#[doc = "Field `OSCUPH2` writer - Output Selection Clear for PWMH output of the channel 2"]
67pub struct OSCUPH2_W<'a> {
68    w: &'a mut W,
69}
70impl<'a> OSCUPH2_W<'a> {
71    #[doc = r"Sets the field bit"]
72    #[inline(always)]
73    pub fn set_bit(self) -> &'a mut W {
74        self.bit(true)
75    }
76    #[doc = r"Clears the field bit"]
77    #[inline(always)]
78    pub fn clear_bit(self) -> &'a mut W {
79        self.bit(false)
80    }
81    #[doc = r"Writes raw bits to the field"]
82    #[inline(always)]
83    pub fn bit(self, value: bool) -> &'a mut W {
84        self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2);
85        self.w
86    }
87}
88#[doc = "Field `OSCUPH3` writer - Output Selection Clear for PWMH output of the channel 3"]
89pub struct OSCUPH3_W<'a> {
90    w: &'a mut W,
91}
92impl<'a> OSCUPH3_W<'a> {
93    #[doc = r"Sets the field bit"]
94    #[inline(always)]
95    pub fn set_bit(self) -> &'a mut W {
96        self.bit(true)
97    }
98    #[doc = r"Clears the field bit"]
99    #[inline(always)]
100    pub fn clear_bit(self) -> &'a mut W {
101        self.bit(false)
102    }
103    #[doc = r"Writes raw bits to the field"]
104    #[inline(always)]
105    pub fn bit(self, value: bool) -> &'a mut W {
106        self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3);
107        self.w
108    }
109}
110#[doc = "Field `OSCUPL0` writer - Output Selection Clear for PWML output of the channel 0"]
111pub struct OSCUPL0_W<'a> {
112    w: &'a mut W,
113}
114impl<'a> OSCUPL0_W<'a> {
115    #[doc = r"Sets the field bit"]
116    #[inline(always)]
117    pub fn set_bit(self) -> &'a mut W {
118        self.bit(true)
119    }
120    #[doc = r"Clears the field bit"]
121    #[inline(always)]
122    pub fn clear_bit(self) -> &'a mut W {
123        self.bit(false)
124    }
125    #[doc = r"Writes raw bits to the field"]
126    #[inline(always)]
127    pub fn bit(self, value: bool) -> &'a mut W {
128        self.w.bits = (self.w.bits & !(0x01 << 16)) | ((value as u32 & 0x01) << 16);
129        self.w
130    }
131}
132#[doc = "Field `OSCUPL1` writer - Output Selection Clear for PWML output of the channel 1"]
133pub struct OSCUPL1_W<'a> {
134    w: &'a mut W,
135}
136impl<'a> OSCUPL1_W<'a> {
137    #[doc = r"Sets the field bit"]
138    #[inline(always)]
139    pub fn set_bit(self) -> &'a mut W {
140        self.bit(true)
141    }
142    #[doc = r"Clears the field bit"]
143    #[inline(always)]
144    pub fn clear_bit(self) -> &'a mut W {
145        self.bit(false)
146    }
147    #[doc = r"Writes raw bits to the field"]
148    #[inline(always)]
149    pub fn bit(self, value: bool) -> &'a mut W {
150        self.w.bits = (self.w.bits & !(0x01 << 17)) | ((value as u32 & 0x01) << 17);
151        self.w
152    }
153}
154#[doc = "Field `OSCUPL2` writer - Output Selection Clear for PWML output of the channel 2"]
155pub struct OSCUPL2_W<'a> {
156    w: &'a mut W,
157}
158impl<'a> OSCUPL2_W<'a> {
159    #[doc = r"Sets the field bit"]
160    #[inline(always)]
161    pub fn set_bit(self) -> &'a mut W {
162        self.bit(true)
163    }
164    #[doc = r"Clears the field bit"]
165    #[inline(always)]
166    pub fn clear_bit(self) -> &'a mut W {
167        self.bit(false)
168    }
169    #[doc = r"Writes raw bits to the field"]
170    #[inline(always)]
171    pub fn bit(self, value: bool) -> &'a mut W {
172        self.w.bits = (self.w.bits & !(0x01 << 18)) | ((value as u32 & 0x01) << 18);
173        self.w
174    }
175}
176#[doc = "Field `OSCUPL3` writer - Output Selection Clear for PWML output of the channel 3"]
177pub struct OSCUPL3_W<'a> {
178    w: &'a mut W,
179}
180impl<'a> OSCUPL3_W<'a> {
181    #[doc = r"Sets the field bit"]
182    #[inline(always)]
183    pub fn set_bit(self) -> &'a mut W {
184        self.bit(true)
185    }
186    #[doc = r"Clears the field bit"]
187    #[inline(always)]
188    pub fn clear_bit(self) -> &'a mut W {
189        self.bit(false)
190    }
191    #[doc = r"Writes raw bits to the field"]
192    #[inline(always)]
193    pub fn bit(self, value: bool) -> &'a mut W {
194        self.w.bits = (self.w.bits & !(0x01 << 19)) | ((value as u32 & 0x01) << 19);
195        self.w
196    }
197}
198impl W {
199    #[doc = "Bit 0 - Output Selection Clear for PWMH output of the channel 0"]
200    #[inline(always)]
201    pub fn oscuph0(&mut self) -> OSCUPH0_W {
202        OSCUPH0_W { w: self }
203    }
204    #[doc = "Bit 1 - Output Selection Clear for PWMH output of the channel 1"]
205    #[inline(always)]
206    pub fn oscuph1(&mut self) -> OSCUPH1_W {
207        OSCUPH1_W { w: self }
208    }
209    #[doc = "Bit 2 - Output Selection Clear for PWMH output of the channel 2"]
210    #[inline(always)]
211    pub fn oscuph2(&mut self) -> OSCUPH2_W {
212        OSCUPH2_W { w: self }
213    }
214    #[doc = "Bit 3 - Output Selection Clear for PWMH output of the channel 3"]
215    #[inline(always)]
216    pub fn oscuph3(&mut self) -> OSCUPH3_W {
217        OSCUPH3_W { w: self }
218    }
219    #[doc = "Bit 16 - Output Selection Clear for PWML output of the channel 0"]
220    #[inline(always)]
221    pub fn oscupl0(&mut self) -> OSCUPL0_W {
222        OSCUPL0_W { w: self }
223    }
224    #[doc = "Bit 17 - Output Selection Clear for PWML output of the channel 1"]
225    #[inline(always)]
226    pub fn oscupl1(&mut self) -> OSCUPL1_W {
227        OSCUPL1_W { w: self }
228    }
229    #[doc = "Bit 18 - Output Selection Clear for PWML output of the channel 2"]
230    #[inline(always)]
231    pub fn oscupl2(&mut self) -> OSCUPL2_W {
232        OSCUPL2_W { w: self }
233    }
234    #[doc = "Bit 19 - Output Selection Clear for PWML output of the channel 3"]
235    #[inline(always)]
236    pub fn oscupl3(&mut self) -> OSCUPL3_W {
237        OSCUPL3_W { w: self }
238    }
239    #[doc = "Writes raw bits to the register."]
240    #[inline(always)]
241    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
242        self.0.bits(bits);
243        self
244    }
245}
246#[doc = "PWM Output Selection Clear Update Register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pwm_oscupd](index.html) module"]
247pub struct PWM_OSCUPD_SPEC;
248impl crate::RegisterSpec for PWM_OSCUPD_SPEC {
249    type Ux = u32;
250}
251#[doc = "`write(|w| ..)` method takes [pwm_oscupd::W](W) writer structure"]
252impl crate::Writable for PWM_OSCUPD_SPEC {
253    type Writer = W;
254}
255#[doc = "`reset()` method sets PWM_OSCUPD to value 0"]
256impl crate::Resettable for PWM_OSCUPD_SPEC {
257    #[inline(always)]
258    fn reset_value() -> Self::Ux {
259        0
260    }
261}
atsame70j21/pwm0/pwm_oscupd.rs

atsame70j21/pwm0/
pwm_oscupd.rs
