[−][src]Type Definition atsame70j20b::matrix::ccfg_dynckg::W

type W = W<u32, CCFG_DYNCKG>;

Writer for register CCFG_DYNCKG

Implementations

`impl W`[src]

`pub fn matckg(&mut self) -> MATCKG_W`[src]

Bit 0 - MATRIX Dynamic Clock Gating

`pub fn bridckg(&mut self) -> BRIDCKG_W`[src]

Bit 1 - Bridge Dynamic Clock Gating Enable

`pub fn efcckg(&mut self) -> EFCCKG_W`[src]

Bit 2 - EFC Dynamic Clock Gating Enable