[][src]Type Definition atsame70j19b::usbhs::usbhs_hstifr::W

type W = W<u32, USBHS_HSTIFR>;

Writer for register USBHS_HSTIFR

Implementations

impl W[src]

pub fn dconnis(&mut self) -> DCONNIS_W[src]

Bit 0 - Device Connection Interrupt Set

pub fn ddiscis(&mut self) -> DDISCIS_W[src]

Bit 1 - Device Disconnection Interrupt Set

pub fn rstis(&mut self) -> RSTIS_W[src]

Bit 2 - USB Reset Sent Interrupt Set

pub fn rsmedis(&mut self) -> RSMEDIS_W[src]

Bit 3 - Downstream Resume Sent Interrupt Set

pub fn rxrsmis(&mut self) -> RXRSMIS_W[src]

Bit 4 - Upstream Resume Received Interrupt Set

pub fn hsofis(&mut self) -> HSOFIS_W[src]

Bit 5 - Host Start of Frame Interrupt Set

pub fn hwupis(&mut self) -> HWUPIS_W[src]

Bit 6 - Host Wake-Up Interrupt Set

pub fn dma_0(&mut self) -> DMA_0_W[src]

Bit 25 - DMA Channel 0 Interrupt Set

pub fn dma_1(&mut self) -> DMA_1_W[src]

Bit 26 - DMA Channel 1 Interrupt Set

pub fn dma_2(&mut self) -> DMA_2_W[src]

Bit 27 - DMA Channel 2 Interrupt Set

pub fn dma_3(&mut self) -> DMA_3_W[src]

Bit 28 - DMA Channel 3 Interrupt Set

pub fn dma_4(&mut self) -> DMA_4_W[src]

Bit 29 - DMA Channel 4 Interrupt Set

pub fn dma_5(&mut self) -> DMA_5_W[src]

Bit 30 - DMA Channel 5 Interrupt Set

pub fn dma_6(&mut self) -> DMA_6_W[src]

Bit 31 - DMA Channel 6 Interrupt Set