[][src]Type Definition atsame70j19b::pwm0::pwm_clk::W

type W = W<u32, PWM_CLK>;

Writer for register PWM_CLK

Implementations

impl W[src]

pub fn diva(&mut self) -> DIVA_W[src]

Bits 0:7 - CLKA Divide Factor

pub fn prea(&mut self) -> PREA_W[src]

Bits 8:11 - CLKA Source Clock Selection

pub fn divb(&mut self) -> DIVB_W[src]

Bits 16:23 - CLKB Divide Factor

pub fn preb(&mut self) -> PREB_W[src]

Bits 24:27 - CLKB Source Clock Selection