[−][src]Struct atsame54p20a::tal::RegisterBlock

#[repr(C)]
pub struct RegisterBlock {
    pub ctrla: CTRLA,
    pub extctrl: EXTCTRL,
    pub evctrl: EVCTRL,
    pub intenclr: INTENCLR,
    pub intenset: INTENSET,
    pub intflag: INTFLAG,
    pub globmask: GLOBMASK,
    pub halt: HALT,
    pub restart: RESTART,
    pub brkstatus: BRKSTATUS,
    pub ctictrla0: CTICTRLA,
    pub ctimask0: CTIMASK,
    pub ctictrla1: CTICTRLA,
    pub ctimask1: CTIMASK,
    pub ctictrla2: CTICTRLA,
    pub ctimask2: CTIMASK,
    pub ctictrla3: CTICTRLA,
    pub ctimask3: CTIMASK,
    pub intstatus: [INTSTATUS; 137],
    pub dmacpusel0: DMACPUSEL0,
    pub dmacpusel1: DMACPUSEL1,
    pub evcpusel0: EVCPUSEL0,
    pub eiccpusel0: EICCPUSEL0,
    pub intcpusel0: INTCPUSEL0,
    pub intcpusel1: INTCPUSEL1,
    pub intcpusel2: INTCPUSEL2,
    pub intcpusel3: INTCPUSEL3,
    pub intcpusel4: INTCPUSEL4,
    pub intcpusel5: INTCPUSEL5,
    pub intcpusel6: INTCPUSEL6,
    pub intcpusel7: INTCPUSEL7,
    pub intcpusel8: INTCPUSEL8,
    pub irqtrig: IRQTRIG,
    pub irqmon: [IRQMON; 1],
    pub cpuirqs0_: [CPUIRQS0_; 5],
    pub cpuirqs1_: [CPUIRQS1_; 5],
    pub smask0_: [SMASK0_; 2],
    pub smask1_: [SMASK1_; 2],
    pub sflagclr: [SFLAGCLR; 2],
    pub sflagset: [SFLAGSET; 2],
    pub sflag: [SFLAG; 2],
    pub sflagclrr: [SFLAGCLRR; 64],
    // some fields omitted
}

Register block

Fields

ctrla: CTRLA

0x00 - Control A

extctrl: EXTCTRL

0x01 - External Break Control

evctrl: EVCTRL

0x04 - Event Control

intenclr: INTENCLR

0x08 - Interrupt Enable Clear

intenset: INTENSET

0x09 - Interrupt Enable Set

intflag: INTFLAG

0x0a - Interrupt Flag Status and Clear

globmask: GLOBMASK

0x0b - Global Break Requests Mask

halt: HALT

0x0c - Debug Halt Request

restart: RESTART

0x0d - Debug Restart Request

brkstatus: BRKSTATUS

0x0e - Break Request Status

ctictrla0: CTICTRLA

0x10 - Cross-Trigger Interface n Control A

ctimask0: CTIMASK

0x11 - Cross-Trigger Interface n Mask

ctictrla1: CTICTRLA

0x12 - Cross-Trigger Interface n Control A

ctimask1: CTIMASK

0x13 - Cross-Trigger Interface n Mask

ctictrla2: CTICTRLA

0x14 - Cross-Trigger Interface n Control A

ctimask2: CTIMASK

0x15 - Cross-Trigger Interface n Mask

ctictrla3: CTICTRLA

0x16 - Cross-Trigger Interface n Control A

ctimask3: CTIMASK

0x17 - Cross-Trigger Interface n Mask

intstatus: [INTSTATUS; 137]

0x20 - Interrupt n Status

dmacpusel0: DMACPUSEL0

0x110 - DMA Channel Interrupts CPU Select 0

dmacpusel1: DMACPUSEL1

0x114 - DMA Channel Interrupts CPU Select 1

evcpusel0: EVCPUSEL0

0x118 - EVSYS Channel Interrupts CPU Select 0

eiccpusel0: EICCPUSEL0

0x120 - EIC External Interrupts CPU Select 0

intcpusel0: INTCPUSEL0

0x128 - Interrupts CPU Select 0

intcpusel1: INTCPUSEL1

0x12c - Interrupts CPU Select 1

intcpusel2: INTCPUSEL2

0x130 - Interrupts CPU Select 2

intcpusel3: INTCPUSEL3

0x134 - Interrupts CPU Select 3

intcpusel4: INTCPUSEL4

0x138 - Interrupts CPU Select 4

intcpusel5: INTCPUSEL5

0x13c - Interrupts CPU Select 5

intcpusel6: INTCPUSEL6

0x140 - Interrupts CPU Select 6

intcpusel7: INTCPUSEL7

0x144 - Interrupts CPU Select 7

intcpusel8: INTCPUSEL8

0x148 - Interrupts CPU Select 8

irqtrig: IRQTRIG

0x164 - Interrupt Trigger

irqmon: [IRQMON; 1]

0x168 - Interrupt Monitor Select

cpuirqs0_: [CPUIRQS0_; 5]

0x180 - Interrupt Status m for CPU n - Group 0

cpuirqs1_: [CPUIRQS1_; 5]

0x1a0 - Interrupt Status m for CPU n - Group 1

smask0_: [SMASK0_; 2]

0x200 - Inter-Process Signal Mask m for CPU n - Group 0

smask1_: [SMASK1_; 2]

0x208 - Inter-Process Signal Mask m for CPU n - Group 1

sflagclr: [SFLAGCLR; 2]

0x220 - Inter-Process Signal Flag Clear

sflagset: [SFLAGSET; 2]

0x228 - Inter-Process Signal Flag Set

sflag: [SFLAG; 2]

0x230 - Inter-Process Signal Flag

sflagclrr: [SFLAGCLRR; 64]

0x300 - Inter-Process Signal Flag Bit n

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